[PATCH 14/15] drm/i915/irq: add intel_display_irq_ack() to irq funcs

Jani Nikula
2026-04-29T10:26:06Z

Some platforms have a separate step for acking display irqs. Call the
platform specific display irq ack hooks, if any, via
intel_display_irq_ack().

Introduce struct intel_display_irq_state to group together all the data
the ack hooks need. In the follow-up, this state will be passed on to a
shared handler function.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 42 ++++-
.../gpu/drm/i915/display/intel_display_irq.h | 12 +-
drivers/gpu/drm/i915/i915_irq.c | 144 +++++++-----------
3 files changed, 102 insertions(+), 96 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 6ba094a0df66..662081e274bf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -529,8 +529,8 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display)
}
}

-void i9xx_pipestat_irq_ack(struct intel_display *display,
- u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+static void i9xx_pipestat_irq_ack(struct intel_display *display,
+ u32 iir, u32 pipe_stats[I915_MAX_PIPES])
{
enum pipe pipe;

@@ -1898,8 +1898,8 @@ static void vlv_page_table_error_irq_handler(struct intel_display *display, u32
}
}

-void vlv_display_error_irq_ack(struct intel_display *display,
- u32 *eir, u32 *dpinvgtt)
+static void vlv_display_error_irq_ack(struct intel_display *display,
+ u32 *eir, u32 *dpinvgtt)
{
u32 emr;

@@ -2010,6 +2010,16 @@ static void i965_display_irq_postinstall(struct intel_display *display)
i915_enable_asle_pipestat(display);
}

+static void i9xx_display_irq_ack(struct intel_display *display,
+ struct intel_display_irq_state *state)
+{
+ if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+ state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+ /* Call regardless, as some status bits might not be signalled in IIR */
+ i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+}
+
static u32 vlv_error_mask(void)
{
/* TODO enable other errors too? */
@@ -2065,6 +2075,19 @@ static void vlv_display_irq_postinstall(struct intel_display *display)
spin_unlock_irq(&display->irq.lock);
}

+static void vlv_display_irq_ack(struct intel_display *display,
+ struct intel_display_irq_state *state)
+{
+ if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+ state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+ if (state->iir & I915_MASTER_ERROR_INTERRUPT)
+ vlv_display_error_irq_ack(display, &state->eir, &state->dpinvgtt);
+
+ /* Call regardless, as some status bits might not be signalled in IIR */
+ i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+}
+
static void ibx_display_irq_reset(struct intel_display *display)
{
if (HAS_PCH_NOP(display))
@@ -2452,6 +2475,7 @@ static void gen11_de_irq_postinstall(struct intel_display *display)
struct intel_display_irq_funcs {
void (*reset)(struct intel_display *display);
void (*postinstall)(struct intel_display *display);
+ void (*ack)(struct intel_display *display, struct intel_display_irq_state *state);
};

struct intel_display_irq_funcs gen11_display_irq_funcs = {
@@ -2467,6 +2491,7 @@ struct intel_display_irq_funcs gen8_display_irq_funcs = {
struct intel_display_irq_funcs vlv_display_irq_funcs = {
.reset = vlv_display_irq_reset,
.postinstall = vlv_display_irq_postinstall,
+ .ack = vlv_display_irq_ack,
};

struct intel_display_irq_funcs ilk_display_irq_funcs = {
@@ -2477,11 +2502,13 @@ struct intel_display_irq_funcs ilk_display_irq_funcs = {
struct intel_display_irq_funcs i965_display_irq_funcs = {
.reset = i9xx_display_irq_reset,
.postinstall = i965_display_irq_postinstall,
+ .ack = i9xx_display_irq_ack,
};

struct intel_display_irq_funcs i915_display_irq_funcs = {
.reset = i9xx_display_irq_reset,
.postinstall = i915_display_irq_postinstall,
+ .ack = i9xx_display_irq_ack,
};

void intel_display_irq_reset(struct intel_display *display)
@@ -2494,6 +2521,13 @@ void intel_display_irq_postinstall(struct intel_display *display)
display->irq.funcs->postinstall(display);
}

+void intel_display_irq_ack(struct intel_display *display,
+ struct intel_display_irq_state *state)
+{
+ if (display->irq.funcs->ack)
+ display->irq.funcs->ack(display, state);
+}
+
void intel_display_irq_init(struct intel_display *display)
{
spin_lock_init(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index fd9873ce9755..3773a31e48f2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -58,8 +58,17 @@ void gen11_display_irq_handler(struct intel_display *display);
u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);

+struct intel_display_irq_state {
+ u32 iir;
+ u32 eir;
+ u32 hotplug_status;
+ u32 dpinvgtt;
+ u32 pipe_stats[I915_MAX_PIPES];
+};
+
void intel_display_irq_reset(struct intel_display *display);
void intel_display_irq_postinstall(struct intel_display *display);
+void intel_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);

u32 i9xx_display_irq_enable_mask(struct intel_display *display);

@@ -67,13 +76,10 @@ u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);

-void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-
void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);

-void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);

void intel_display_irq_init(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7ffa0e8c5608..bb65ce9d09b2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -236,17 +236,15 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);

do {
- u32 iir, gt_iir, pm_iir;
- u32 eir = 0, dpinvgtt = 0;
- u32 pipe_stats[I915_MAX_PIPES] = {};
- u32 hotplug_status = 0;
+ struct intel_display_irq_state state = {};
+ u32 gt_iir, pm_iir;
u32 ier = 0;

gt_iir = intel_uncore_read(&dev_priv->uncore, GTIIR);
pm_iir = intel_uncore_read(&dev_priv->uncore, GEN6_PMIIR);
- iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+ state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);

- if (gt_iir == 0 && pm_iir == 0 && iir == 0)
+ if (gt_iir == 0 && pm_iir == 0 && state.iir == 0)
break;

ret = IRQ_HANDLED;
@@ -272,22 +270,14 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
if (pm_iir)
intel_uncore_write(&dev_priv->uncore, GEN6_PMIIR, pm_iir);

- if (iir & I915_DISPLAY_PORT_INTERRUPT)
- hotplug_status = i9xx_hpd_irq_ack(display);
-
- if (iir & I915_MASTER_ERROR_INTERRUPT)
- vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
- /* Call regardless, as some status bits might not be
- * signalled in IIR */
- i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+ intel_display_irq_ack(display, &state);

/*
* VLV_IIR is single buffered, and reflects the level
* from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
*/
- if (iir)
- intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+ if (state.iir)
+ intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);

intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
@@ -297,17 +287,17 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
if (pm_iir)
gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);

- if (iir & (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT))
+ if (state.iir & (I915_LPE_PIPE_A_INTERRUPT |
+ I915_LPE_PIPE_B_INTERRUPT))
intel_lpe_audio_irq_handler(display);

- if (hotplug_status)
- i9xx_hpd_irq_handler(display, hotplug_status);
+ if (state.hotplug_status)
+ i9xx_hpd_irq_handler(display, state.hotplug_status);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
- vlv_display_error_irq_handler(display, eir, dpinvgtt);
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+ vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);

- valleyview_pipestat_irq_handler(display, pipe_stats);
+ valleyview_pipestat_irq_handler(display, state.pipe_stats);
} while (0);

pmu_irq_stats(dev_priv, ret);
@@ -330,16 +320,14 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);

do {
- u32 master_ctl, iir;
- u32 eir = 0, dpinvgtt = 0;
- u32 pipe_stats[I915_MAX_PIPES] = {};
- u32 hotplug_status = 0;
+ struct intel_display_irq_state state = {};
+ u32 master_ctl;
u32 ier = 0;

master_ctl = intel_uncore_read(&dev_priv->uncore, GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
- iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+ state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);

- if (master_ctl == 0 && iir == 0)
+ if (master_ctl == 0 && state.iir == 0)
break;

ret = IRQ_HANDLED;
@@ -362,38 +350,30 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)

gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);

- if (iir & I915_DISPLAY_PORT_INTERRUPT)
- hotplug_status = i9xx_hpd_irq_ack(display);
-
- if (iir & I915_MASTER_ERROR_INTERRUPT)
- vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
- /* Call regardless, as some status bits might not be
- * signalled in IIR */
- i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+ intel_display_irq_ack(display, &state);

/*
* VLV_IIR is single buffered, and reflects the level
* from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
*/
- if (iir)
- intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+ if (state.iir)
+ intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);

intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

- if (iir & (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT |
- I915_LPE_PIPE_C_INTERRUPT))
+ if (state.iir & (I915_LPE_PIPE_A_INTERRUPT |
+ I915_LPE_PIPE_B_INTERRUPT |
+ I915_LPE_PIPE_C_INTERRUPT))
intel_lpe_audio_irq_handler(display);

- if (hotplug_status)
- i9xx_hpd_irq_handler(display, hotplug_status);
+ if (state.hotplug_status)
+ i9xx_hpd_irq_handler(display, state.hotplug_status);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
- vlv_display_error_irq_handler(display, eir, dpinvgtt);
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+ vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);

- valleyview_pipestat_irq_handler(display, pipe_stats);
+ valleyview_pipestat_irq_handler(display, state.pipe_stats);
} while (0);

pmu_irq_stats(dev_priv, ret);
@@ -904,39 +884,32 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);

do {
- u32 pipe_stats[I915_MAX_PIPES] = {};
+ struct intel_display_irq_state state = {};
u32 eir = 0, eir_stuck = 0;
- u32 hotplug_status = 0;
- u32 iir;

- iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
- if (iir == 0)
+ state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+ if (state.iir == 0)
break;

ret = IRQ_HANDLED;

- if (iir & I915_DISPLAY_PORT_INTERRUPT)
- hotplug_status = i9xx_hpd_irq_ack(display);
-
- /* Call regardless, as some status bits might not be
- * signalled in IIR */
- i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+ intel_display_irq_ack(display, &state);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);

- intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+ intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);

- if (iir & I915_USER_INTERRUPT)
- intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
+ if (state.iir & I915_USER_INTERRUPT)
+ intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], state.iir);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
i9xx_error_irq_handler(dev_priv, eir, eir_stuck);

- if (hotplug_status)
- i9xx_hpd_irq_handler(display, hotplug_status);
+ if (state.hotplug_status)
+ i9xx_hpd_irq_handler(display, state.hotplug_status);

- i915_pipestat_irq_handler(display, iir, pipe_stats);
+ i915_pipestat_irq_handler(display, state.iir, state.pipe_stats);
} while (0);

pmu_irq_stats(dev_priv, ret);
@@ -1013,44 +986,37 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);

do {
- u32 pipe_stats[I915_MAX_PIPES] = {};
+ struct intel_display_irq_state state = {};
u32 eir = 0, eir_stuck = 0;
- u32 hotplug_status = 0;
- u32 iir;

- iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
- if (iir == 0)
+ state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+ if (state.iir == 0)
break;

ret = IRQ_HANDLED;

- if (iir & I915_DISPLAY_PORT_INTERRUPT)
- hotplug_status = i9xx_hpd_irq_ack(display);
-
- /* Call regardless, as some status bits might not be
- * signalled in IIR */
- i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+ intel_display_irq_ack(display, &state);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);

- intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+ intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);

- if (iir & I915_USER_INTERRUPT)
+ if (state.iir & I915_USER_INTERRUPT)
intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
- iir);
+ state.iir);

- if (iir & I915_BSD_USER_INTERRUPT)
+ if (state.iir & I915_BSD_USER_INTERRUPT)
intel_engine_cs_irq(to_gt(dev_priv)->engine[VCS0],
- iir >> 25);
+ state.iir >> 25);

- if (iir & I915_MASTER_ERROR_INTERRUPT)
+ if (state.iir & I915_MASTER_ERROR_INTERRUPT)
i9xx_error_irq_handler(dev_priv, eir, eir_stuck);

- if (hotplug_status)
- i9xx_hpd_irq_handler(display, hotplug_status);
+ if (state.hotplug_status)
+ i9xx_hpd_irq_handler(display, state.hotplug_status);

- i965_pipestat_irq_handler(display, iir, pipe_stats);
+ i965_pipestat_irq_handler(display, state.iir, state.pipe_stats);
} while (0);

pmu_irq_stats(dev_priv, IRQ_HANDLED);
--
2.47.3