Re: [PATCH 8/8] drm/i915: fix misalignment in HDCP register def

Sean Paul
2018-02-02T14:38:27Z

On Fri, Feb 02, 2018 at 04:15:20PM +0530, Ramalingam C wrote:
> This patch aligns all definitions of hdcp registers and their bits.

Ah, thanks! I think these got mangled when I dropped the SKL_ prefix.

Reviewed-by: Sean Paul <seanpaul@chromium.org>

>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 58 ++++++++++++++++++++---------------------
> 1 file changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 65ba10ad1fe5..e9c79b560823 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8483,34 +8483,34 @@ enum skl_power_gate {
> #define CNL_AUX_ANAOVRD1_LDO_BYPASS (1<<23)
>
> /* HDCP Key Registers */
> -#define HDCP_KEY_CONF _MMIO(0x66c00)
> +#define HDCP_KEY_CONF _MMIO(0x66c00)
> #define HDCP_AKSV_SEND_TRIGGER BIT(31)
> #define HDCP_CLEAR_KEYS_TRIGGER BIT(30)
> #define HDCP_KEY_LOAD_TRIGGER BIT(8)
> -#define HDCP_KEY_STATUS _MMIO(0x66c04)
> -#define HDCP_FUSE_IN_PROGRESS BIT(7)
> +#define HDCP_KEY_STATUS _MMIO(0x66c04)
> +#define HDCP_FUSE_IN_PROGRESS BIT(7)
> #define HDCP_FUSE_ERROR BIT(6)
> -#define HDCP_FUSE_DONE BIT(5)
> -#define HDCP_KEY_LOAD_STATUS BIT(1)
> +#define HDCP_FUSE_DONE BIT(5)
> +#define HDCP_KEY_LOAD_STATUS BIT(1)
> #define HDCP_KEY_LOAD_DONE BIT(0)
> -#define HDCP_AKSV_LO _MMIO(0x66c10)
> -#define HDCP_AKSV_HI _MMIO(0x66c14)
> +#define HDCP_AKSV_LO _MMIO(0x66c10)
> +#define HDCP_AKSV_HI _MMIO(0x66c14)
>
> /* HDCP Repeater Registers */
> -#define HDCP_REP_CTL _MMIO(0x66d00)
> -#define HDCP_DDIB_REP_PRESENT BIT(30)
> -#define HDCP_DDIA_REP_PRESENT BIT(29)
> -#define HDCP_DDIC_REP_PRESENT BIT(28)
> -#define HDCP_DDID_REP_PRESENT BIT(27)
> -#define HDCP_DDIF_REP_PRESENT BIT(26)
> -#define HDCP_DDIE_REP_PRESENT BIT(25)
> +#define HDCP_REP_CTL _MMIO(0x66d00)
> +#define HDCP_DDIB_REP_PRESENT BIT(30)
> +#define HDCP_DDIA_REP_PRESENT BIT(29)
> +#define HDCP_DDIC_REP_PRESENT BIT(28)
> +#define HDCP_DDID_REP_PRESENT BIT(27)
> +#define HDCP_DDIF_REP_PRESENT BIT(26)
> +#define HDCP_DDIE_REP_PRESENT BIT(25)
> #define HDCP_DDIB_SHA1_M0 (1 << 20)
> #define HDCP_DDIA_SHA1_M0 (2 << 20)
> #define HDCP_DDIC_SHA1_M0 (3 << 20)
> #define HDCP_DDID_SHA1_M0 (4 << 20)
> #define HDCP_DDIF_SHA1_M0 (5 << 20)
> #define HDCP_DDIE_SHA1_M0 (6 << 20) /* Bspec says 5? */
> -#define HDCP_SHA1_BUSY BIT(16)
> +#define HDCP_SHA1_BUSY BIT(16)
> #define HDCP_SHA1_READY BIT(17)
> #define HDCP_SHA1_COMPLETE BIT(18)
> #define HDCP_SHA1_V_MATCH BIT(19)
> @@ -8526,7 +8526,7 @@ enum skl_power_gate {
> #define HDCP_SHA_V_PRIME_H3 _MMIO(0x66d10)
> #define HDCP_SHA_V_PRIME_H4 _MMIO(0x66d14)
> #define HDCP_SHA_V_PRIME(h) _MMIO((0x66d04 + h * 4))
> -#define HDCP_SHA_TEXT _MMIO(0x66d18)
> +#define HDCP_SHA_TEXT _MMIO(0x66d18)
>
> /* HDCP Auth Registers */
> #define _PORTA_HDCP_AUTHENC 0x66800
> @@ -8542,25 +8542,25 @@ enum skl_power_gate {
> _PORTD_HDCP_AUTHENC, \
> _PORTE_HDCP_AUTHENC, \
> _PORTF_HDCP_AUTHENC) + x)
> -#define PORT_HDCP_CONF(port) _PORT_HDCP_AUTHENC(port, 0x0)
> -#define HDCP_CONF_CAPTURE_AN BIT(0)
> -#define HDCP_CONF_AUTH_AND_ENC (BIT(1) | BIT(0))
> -#define PORT_HDCP_ANINIT(port) _PORT_HDCP_AUTHENC(port, 0x4)
> -#define PORT_HDCP_ANLO(port) _PORT_HDCP_AUTHENC(port, 0x8)
> -#define PORT_HDCP_ANHI(port) _PORT_HDCP_AUTHENC(port, 0xC)
> -#define PORT_HDCP_BKSVLO(port) _PORT_HDCP_AUTHENC(port, 0x10)
> -#define PORT_HDCP_BKSVHI(port) _PORT_HDCP_AUTHENC(port, 0x14)
> -#define PORT_HDCP_RPRIME(port) _PORT_HDCP_AUTHENC(port, 0x18)
> -#define PORT_HDCP_STATUS(port) _PORT_HDCP_AUTHENC(port, 0x1C)
> +#define PORT_HDCP_CONF(port) _PORT_HDCP_AUTHENC(port, 0x0)
> +#define HDCP_CONF_CAPTURE_AN BIT(0)
> +#define HDCP_CONF_AUTH_AND_ENC (BIT(1) | BIT(0))
> +#define PORT_HDCP_ANINIT(port) _PORT_HDCP_AUTHENC(port, 0x4)
> +#define PORT_HDCP_ANLO(port) _PORT_HDCP_AUTHENC(port, 0x8)
> +#define PORT_HDCP_ANHI(port) _PORT_HDCP_AUTHENC(port, 0xC)
> +#define PORT_HDCP_BKSVLO(port) _PORT_HDCP_AUTHENC(port, 0x10)
> +#define PORT_HDCP_BKSVHI(port) _PORT_HDCP_AUTHENC(port, 0x14)
> +#define PORT_HDCP_RPRIME(port) _PORT_HDCP_AUTHENC(port, 0x18)
> +#define PORT_HDCP_STATUS(port) _PORT_HDCP_AUTHENC(port, 0x1C)
> #define HDCP_STATUS_STREAM_A_ENC BIT(31)
> #define HDCP_STATUS_STREAM_B_ENC BIT(30)
> #define HDCP_STATUS_STREAM_C_ENC BIT(29)
> #define HDCP_STATUS_STREAM_D_ENC BIT(28)
> #define HDCP_STATUS_AUTH BIT(21)
> #define HDCP_STATUS_ENC BIT(20)
> -#define HDCP_STATUS_RI_MATCH BIT(19)
> -#define HDCP_STATUS_R0_READY BIT(18)
> -#define HDCP_STATUS_AN_READY BIT(17)
> +#define HDCP_STATUS_RI_MATCH BIT(19)
> +#define HDCP_STATUS_R0_READY BIT(18)
> +#define HDCP_STATUS_AN_READY BIT(17)
> #define HDCP_STATUS_CIPHER BIT(16)
> #define HDCP_STATUS_FRAME_CNT(x) ((x >> 8) & 0xff)
>
> --
> 2.7.4
>

--
Sean Paul, Software Engineer, Google / Chromium OS