Re: [PATCH 4/4] drm/i915/bw: Extract get_display_bw_params()

[Jani Nikula <jani.nikula@linux.intel.com>]

On Wed, 08 Apr 2026, Gustavo Sousa <gustavo.sousa@intel.com> wrote:
> Just like it is done for the platform-specific bandwidth parameters, use
> a separate function named get_display_bw_params() to return the display
> IP-specific parameters.  This simplifies intel_bw_init_hw() by having
> just one call for each of *_get_info() function.
>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 31 ++++++++++++++++++++-----------
>  1 file changed, 20 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 64c6f18346bb..1f08fb893ee7 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -529,12 +529,26 @@ static const struct intel_display_bw_params xelpdp_disp_bw_params = {
>  	.displayrtids = 256,
>  };
>  
> +static const struct intel_display_bw_params *get_display_bw_params(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 14) {
> +		return &xelpdp_disp_bw_params;
> +	} else if (DISPLAY_VER(display) >= 12) {
> +		if (display->platform.rocketlake)
> +			return &rkl_disp_bw_params;
> +		else
> +			return &tgl_disp_bw_params;
> +	} else {
> +		return &icl_disp_bw_params;
> +	}
> +}
> +
>  static int icl_get_bw_info(struct intel_display *display,
> -			   const struct dram_info *dram_info,
> -			   const struct intel_display_bw_params *disp_bw_params)
> +			   const struct dram_info *dram_info)
>  {
>  	struct intel_qgv_info qi = {};
>  	const struct intel_platform_bw_params *plat_bw_params = get_platform_bw_params(display);
> +	const struct intel_display_bw_params *disp_bw_params = get_display_bw_params(display);

I would pass both of these in as parameters, with centralized
assignment, and not have every single function call the getters.

>  	bool is_y_tile = true; /* assume y tile may be used */
>  	int num_channels = max_t(u8, 1, dram_info->num_channels);
>  	int ipqdepth, ipqdepthpch = 16;
> @@ -602,11 +616,11 @@ static int icl_get_bw_info(struct intel_display *display,
>  }
>  
>  static int tgl_get_bw_info(struct intel_display *display,
> -			   const struct dram_info *dram_info,
> -			   const struct intel_display_bw_params *disp_bw_params)
> +			   const struct dram_info *dram_info)
>  {
>  	struct intel_qgv_info qi = {};
>  	const struct intel_platform_bw_params *plat_bw_params = get_platform_bw_params(display);
> +	const struct intel_display_bw_params *disp_bw_params = get_display_bw_params(display);
>  	bool is_y_tile = true; /* assume y tile may be used */
>  	int num_channels = max_t(u8, 1, dram_info->num_channels);
>  	int ipqdepth, ipqdepthpch = 16;
> @@ -893,17 +907,12 @@ void intel_bw_init_hw(struct intel_display *display)
>  
>  	if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
>  		xe2_hpd_get_bw_info(display, dram_info);
> -	} else if (DISPLAY_VER(display) >= 14) {
> -		tgl_get_bw_info(display, dram_info, &xelpdp_disp_bw_params);
>  	} else if (display->platform.dg2) {
>  		dg2_get_bw_info(display);
>  	} else if (DISPLAY_VER(display) >= 12) {
> -		if (display->platform.rocketlake)
> -			tgl_get_bw_info(display, dram_info, &rkl_disp_bw_params);
> -		else
> -			tgl_get_bw_info(display, dram_info, &tgl_disp_bw_params);
> +		tgl_get_bw_info(display, dram_info);
>  	} else if (DISPLAY_VER(display) == 11) {
> -		icl_get_bw_info(display, dram_info, &icl_disp_bw_params);
> +		icl_get_bw_info(display, dram_info);
>  	}
>  }

-- 
Jani Nikula, Intel