Re: [PATCH 11/14] drm/i915: Upscale scaler max scale for NV12

[Mahesh Kumar <mahesh1.kumar@intel.com>]

On Tuesday 10 October 2017 05:47 PM, Vidya Srinivas wrote:
> From: Chandra Konduru <chandra.konduru@intel.com>
>
> This patch updates scaler max limit support for NV12
>
> v2: Rebased (me)
>
> v3: Rebased (me)
>
> v4: Missed the Tested-by/Reviewed-by in the previous series
> 	Adding the same to commit message in this version.
>
> v5: Addressed review comments from Ville and rebased
> 	- calculation of max_scale to be made
> 	less convoluted by splitting it up a bit
> 	- Indentation errors to be fixed in the series
>
> v6: Rebased (me)
> 	Fixed review comments from Paauwe, Bob J
> 	Previous version, where a split of calculation
> 	was done, was wrong. Fixed that issue here.
>
> v7: Rebased (me)
>
> v8: Rebased (me)
>
> Tested-by: Clinton Taylor <clinton.a.taylor@intel.com>
> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++----------
>   drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
>   drivers/gpu/drm/i915/intel_sprite.c  |  3 ++-
>   3 files changed, 27 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a10bbe8..f71a704 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3472,6 +3472,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
>   		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
>   	case DRM_FORMAT_VYUY:
>   		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
> +	case DRM_FORMAT_NV12:
> +		return PLANE_CTL_FORMAT_NV12;
>   	default:
>   		MISSING_CASE(pixel_format);
>   	}
> @@ -4727,7 +4729,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
>   static int
>   skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
>   		  unsigned int scaler_user, int *scaler_id,
> -		  int src_w, int src_h, int dst_w, int dst_h)
> +		  int src_w, int src_h, int dst_w, int dst_h,
> +		  uint32_t pixel_format)
>   {
>   	struct intel_crtc_scaler_state *scaler_state =
>   		&crtc_state->scaler_state;
> @@ -4743,7 +4746,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
>   	 * the 90/270 degree plane rotation cases (to match the
>   	 * GTT mapping), hence no need to account for rotation here.
>   	 */
> -	need_scaling = src_w != dst_w || src_h != dst_h;
> +	need_scaling = src_w != dst_w || src_h != dst_h ||
> +		(pixel_format == DRM_FORMAT_NV12);
IMHO keep nv12 check separate from rest of src/dst_w/h checks.
>   
>   	if (crtc_state->ycbcr420 && scaler_user == SKL_CRTC_INDEX)
>   		need_scaling = true;
> @@ -4822,7 +4826,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state)
>   	return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
>   		&state->scaler_state.scaler_id,
>   		state->pipe_src_w, state->pipe_src_h,
> -		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay);
> +		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0);
>   }
>   
>   /**
> @@ -4852,7 +4856,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>   				drm_rect_width(&plane_state->base.src) >> 16,
>   				drm_rect_height(&plane_state->base.src) >> 16,
>   				drm_rect_width(&plane_state->base.dst),
> -				drm_rect_height(&plane_state->base.dst));
> +				drm_rect_height(&plane_state->base.dst),
> +				fb ? fb->format->format : 0);
>   
>   	if (ret || plane_state->scaler_id < 0)
>   		return ret;
> @@ -4878,6 +4883,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>   	case DRM_FORMAT_YVYU:
>   	case DRM_FORMAT_UYVY:
>   	case DRM_FORMAT_VYUY:
> +	case DRM_FORMAT_NV12:
>   		break;
>   	default:
>   		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> @@ -12799,11 +12805,12 @@ static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
>   }
>   
>   int
> -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
> +skl_max_scale(struct intel_crtc *intel_crtc,
> +	struct intel_crtc_state *crtc_state, uint32_t pixel_format)
>   {
>   	struct drm_i915_private *dev_priv;
> -	int max_scale;
> -	int crtc_clock, max_dotclk;
> +	int max_scale, mult;
> +	int crtc_clock, max_dotclk, tmpclk1, tmpclk2;
>   
>   	if (!intel_crtc || !crtc_state->base.enable)
>   		return DRM_PLANE_HELPER_NO_SCALING;
> @@ -12825,8 +12832,10 @@ static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
>   	 *            or
>   	 *    cdclk/crtc_clock
>   	 */
> -	max_scale = min((1 << 16) * 3 - 1,
> -			(1 << 8) * ((max_dotclk << 8) / crtc_clock));
> +	mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
> +	tmpclk1 = (1 << 16) * mult - 1;
> +	tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
> +	max_scale = min(tmpclk1, tmpclk2);
you can optimize use of max_scale by directly returning min(tmpclk1, 
tmpclk2) :)

-Mahesh
>   
>   	return max_scale;
>   }
> @@ -12847,7 +12856,11 @@ static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
>   		/* use scaler when colorkey is not required */
>   		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
>   			min_scale = 1;
> -			max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
> +			max_scale = skl_max_scale(to_intel_crtc(crtc),
> +						crtc_state,
> +						state->base.fb ?
> +						state->base.fb->format->format :
> +						0);
>   		}
>   		can_position = true;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 51ae058..fd60635 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1490,7 +1490,8 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
>   				 struct intel_crtc_state *pipe_config);
>   
>   int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
> -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
> +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
> +	uint32_t pixel_format);
>   
>   static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 091bb42..6f98bc5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -817,7 +817,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
>   		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
>   			can_scale = 1;
>   			min_scale = 1;
> -			max_scale = skl_max_scale(crtc, crtc_state);
> +			max_scale = skl_max_scale(crtc, crtc_state,
> +						fb->format->format);
>   		} else {
>   			can_scale = 0;
>   			min_scale = DRM_PLANE_HELPER_NO_SCALING;

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