From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dhinakaran Pandiyan Subject: Re: [PATCH v2 06/11] drm: Add the PSR SU granularity registers offsets Date: Fri, 30 Nov 2018 16:13:01 -0800 Message-ID: <3ec0ea7d3d31e74ba4399cf2d0046d219a958efb.camel@intel.com> References: <20181130022525.25676-1-jose.souza@intel.com> <20181130022525.25676-6-jose.souza@intel.com> Reply-To: dhinakaran.pandiyan@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20181130022525.25676-6-jose.souza@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: =?ISO-8859-1?Q?Jos=E9?= Roberto de Souza , intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, Rodrigo Vivi List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCAyMDE4LTExLTI5IGF0IDE4OjI1IC0wODAwLCBKb3PDqSBSb2JlcnRvIGRlIFNvdXph IHdyb3RlOgo+IFNvdXJjZSBpcyByZXF1aXJlZCB0byBjb21wbHkgdG8gc2luayBTVSBncmFudWxh cml0eSB3aGVuCj4gRFBfUFNSMl9TVV9HUkFOVUxBUklUWV9SRVFVSVJFRCBpcyBzZXQgaW4gRFBf UFNSX0NBUFMsCj4gc28gYWRkaW5nIHRoZSByZWdpc3RlcnMgb2Zmc2V0cy4KPiAKPiB2MjogQWxz byBhZGRpbmcgRFBfUFNSMl9TVV9ZX0dSQU5VTEFSSVRZKFJvZHJpZ28pCj4gCj4gQ2M6IERoaW5h a2FyYW4gUGFuZGl5YW4gPGRoaW5ha2FyYW4ucGFuZGl5YW5AaW50ZWwuY29tPgo+IENjOiBSb2Ry aWdvIFZpdmkgPHJvZHJpZ28udml2aUBpbnRlbC5jb20+Cj4gU2lnbmVkLW9mZi1ieTogSm9zw6kg Um9iZXJ0byBkZSBTb3V6YSA8am9zZS5zb3V6YUBpbnRlbC5jb20+Cj4gLS0tCj4gIGluY2x1ZGUv ZHJtL2RybV9kcF9oZWxwZXIuaCB8IDQgKysrKwo+ICAxIGZpbGUgY2hhbmdlZCwgNCBpbnNlcnRp b25zKCspCj4gCj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvZHJtL2RybV9kcF9oZWxwZXIuaAo+IGIv aW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gaW5kZXggMDQ3MzE0Y2UyNWQ2Li4wZTA0YjJk YjNkZGUgMTAwNjQ0Cj4gLS0tIGEvaW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gKysrIGIv aW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4gQEAgLTMxNCw2ICszMTQsMTAgQEAKPiAgIyBk ZWZpbmUgRFBfUFNSX1NFVFVQX1RJTUVfU0hJRlQgICAgICAgICAgICAxCj4gICMgZGVmaW5lIERQ X1BTUjJfU1VfWV9DT09SRElOQVRFX1JFUVVJUkVEICAgKDEgPDwgNCkgIC8qIGVEUCAxLjRhICov Cj4gICMgZGVmaW5lIERQX1BTUjJfU1VfR1JBTlVMQVJJVFlfUkVRVUlSRUQgICAgKDEgPDwgNSkg IC8qIGVEUCAxLjRiICovCj4gKwo+ICsjZGVmaW5lIERQX1BTUjJfU1VfWF9HUkFOVUxBUklUWQkg ICAgMHgwNzIgLyogZURQIDEuNGIgKi8KPiArI2RlZmluZSBEUF9QU1IyX1NVX1lfR1JBTlVMQVJJ VFkJICAgIDB4MDc0IC8qIGVEUCAxLjRiICovCkRlZmluaXRpb25zIGFib3ZlIHVzZSBzcGFjZXMg aW5zdGVhZCBvZiB0YWJzLCBzbyBpdCdkIGhhdmUgYmVlbiBnb29kIHRvCmJlIGNvbnNpc3RlbnQu IEJ1dCwgdGhlcmUgYXJlIHBsYWNlcyBpbiB0aGUgZmlsZSB3aGVyZSB0YWJzIGFyZSB1c2VkCnRv bywgc28gd2lsbCBsZWF2ZSBpdCB0byB5b3UgaWYgeW91IHdhbnQgdG8gc3dpdGNoLgoKPiArClZl cmlmaWVkIGFnYWluc3QgZURQIHNwZWMgMS40YgpSZXZpZXdlZC1ieTogRGhpbmFrYXJhbiBQYW5k aXlhbiA8ZGhpbmFrYXJhbi5wYW5kaXlhbkBpbnRlbC5jb20+Cgo+ICAvKgo+ICAgKiAweDgwLTB4 OGYgZGVzY3JpYmUgZG93bnN0cmVhbSBwb3J0IGNhcGFiaWxpdGllcywgYnV0IHRoZXJlIGFyZQo+ IHR3byBsYXlvdXRzCj4gICAqIGJhc2VkIG9uIHdoZXRoZXIgRFBfREVUQUlMRURfQ0FQX0lORk9f QVZBSUxBQkxFIHdhcyBzZXQuICBJZiBpdAo+IHdhcyBub3QsCgpfX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1k ZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcv bWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK