From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Subject: Re: [PATCH 1/2] drm/i915/guc: Limit number of scratch
 registers used for H2G
Date: Tue, 16 Oct 2018 09:26:54 -0700
Message-ID: <40463a81-a0a1-2cac-4426-40de56416a35@intel.com>
References: <20181016094207.22924-1-michal.wajdeczko@intel.com>
 <153969028853.22931.17968946219589774177@skylake-alporthouse-com>
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