From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF920C433F5 for ; Wed, 27 Oct 2021 11:21:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6ACB261040 for ; Wed, 27 Oct 2021 11:21:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6ACB261040 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E6BC16E888; Wed, 27 Oct 2021 11:21:20 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE3716E883; Wed, 27 Oct 2021 11:21:18 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10149"; a="210219859" X-IronPort-AV: E=Sophos;i="5.87,186,1631602800"; d="scan'208";a="210219859" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2021 04:21:18 -0700 X-IronPort-AV: E=Sophos;i="5.87,186,1631602800"; d="scan'208";a="529590996" Received: from djustese-mobl.ger.corp.intel.com (HELO [10.249.254.205]) ([10.249.254.205]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2021 04:21:17 -0700 Message-ID: <46183835-ace2-90d1-dc06-72dd94edce3a@linux.intel.com> Date: Wed, 27 Oct 2021 13:21:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Content-Language: en-US To: Matthew Auld , intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org References: <20211021114410.2437099-1-matthew.auld@intel.com> From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= In-Reply-To: <20211021114410.2437099-1-matthew.auld@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/clflush: fixup handling of cache_dirty X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 10/21/21 13:44, Matthew Auld wrote: > In theory if clflush_work_create() somehow fails here, and we don't yet > have mm.pages populated then we end up resetting cache_dirty, which is > likely wrong, since that will potentially skip the flush-on-acquire, if > it was needed. > > It looks like intel_user_framebuffer_dirty() can arrive here before the > pages are populated. > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström > --- > drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c > index f0435c6feb68..d09365b5eb29 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c > @@ -20,6 +20,7 @@ static void __do_clflush(struct drm_i915_gem_object *obj) > { > GEM_BUG_ON(!i915_gem_object_has_pages(obj)); > drm_clflush_sg(obj->mm.pages); > + obj->cache_dirty = false; > I think the guidelines are to avoid updating state in async work if at all possible, so we need to add this after __do_clflush() in the sync path and after dma_fence_work_commit() in the async path. Will that work? /Thomas