* [PATCH v3 01/11] PCI: Move Resizable BAR code into rebar.c
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 02/11] PCI: Cleanup pci_rebar_bytes_to_size() and move " Ilpo Järvinen
` (11 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
Jonathan Corbet, linux-doc, linux-kernel
Cc: Ilpo Järvinen
In the lack of better place to put it, Resizable BAR code has been
placed inside pci.c and setup-res.c that do not use it for anything.
Upcoming changes are going to add more Resizable BAR related API
functions to PCI core increasing the Resizable BAR code size from the
current.
As pci.c is huge file as is, extract the Resizable BAR related code out
of it into rebar.c and move the actual BAR resize code from setup-res.c
as well.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
Documentation/driver-api/pci/pci.rst | 3 +
drivers/pci/Makefile | 2 +-
drivers/pci/pci.c | 145 ----------------
drivers/pci/pci.h | 1 +
drivers/pci/rebar.c | 236 +++++++++++++++++++++++++++
drivers/pci/setup-res.c | 78 ---------
6 files changed, 241 insertions(+), 224 deletions(-)
create mode 100644 drivers/pci/rebar.c
diff --git a/Documentation/driver-api/pci/pci.rst b/Documentation/driver-api/pci/pci.rst
index 59d86e827198..99a1bbaaec5d 100644
--- a/Documentation/driver-api/pci/pci.rst
+++ b/Documentation/driver-api/pci/pci.rst
@@ -37,6 +37,9 @@ PCI Support Library
.. kernel-doc:: drivers/pci/slot.c
:export:
+.. kernel-doc:: drivers/pci/rebar.c
+ :export:
+
.. kernel-doc:: drivers/pci/rom.c
:export:
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 67647f1880fb..f3c81c892786 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -4,7 +4,7 @@
obj-$(CONFIG_PCI) += access.o bus.o probe.o host-bridge.o \
remove.o pci.o pci-driver.o search.o \
- rom.o setup-res.o irq.o vpd.o \
+ rebar.o rom.o setup-res.o irq.o vpd.o \
setup-bus.o vc.o mmap.o devres.o
obj-$(CONFIG_PCI) += msi/
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b14dd064006c..aedf6a9932ce 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1823,32 +1823,6 @@ static void pci_restore_config_space(struct pci_dev *pdev)
}
}
-static void pci_restore_rebar_state(struct pci_dev *pdev)
-{
- unsigned int pos, nbars, i;
- u32 ctrl;
-
- pos = pdev->rebar_cap;
- if (!pos)
- return;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);
-
- for (i = 0; i < nbars; i++, pos += 8) {
- struct resource *res;
- int bar_idx, size;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;
- res = pci_resource_n(pdev, bar_idx);
- size = pci_rebar_bytes_to_size(resource_size(res));
- ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
- ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);
- pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
- }
-}
-
/**
* pci_restore_state - Restore the saved state of a PCI device
* @dev: PCI device that we're dealing with
@@ -3687,125 +3661,6 @@ void pci_acs_init(struct pci_dev *dev)
pci_enable_acs(dev);
}
-void pci_rebar_init(struct pci_dev *pdev)
-{
- pdev->rebar_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR);
-}
-
-/**
- * pci_rebar_find_pos - find position of resize ctrl reg for BAR
- * @pdev: PCI device
- * @bar: BAR to find
- *
- * Helper to find the position of the ctrl register for a BAR.
- * Returns -ENOTSUPP if resizable BARs are not supported at all.
- * Returns -ENOENT if no ctrl register for the BAR could be found.
- */
-static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
-{
- unsigned int pos, nbars, i;
- u32 ctrl;
-
- if (pci_resource_is_iov(bar)) {
- pos = pci_iov_vf_rebar_cap(pdev);
- bar = pci_resource_num_to_vf_bar(bar);
- } else {
- pos = pdev->rebar_cap;
- }
-
- if (!pos)
- return -ENOTSUPP;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);
-
- for (i = 0; i < nbars; i++, pos += 8) {
- int bar_idx;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- bar_idx = FIELD_GET(PCI_REBAR_CTRL_BAR_IDX, ctrl);
- if (bar_idx == bar)
- return pos;
- }
-
- return -ENOENT;
-}
-
-/**
- * pci_rebar_get_possible_sizes - get possible sizes for BAR
- * @pdev: PCI device
- * @bar: BAR to query
- *
- * Get the possible sizes of a resizable BAR as bitmask defined in the spec
- * (bit 0=1MB, bit 31=128TB). Returns 0 if BAR isn't resizable.
- */
-u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
-{
- int pos;
- u32 cap;
-
- pos = pci_rebar_find_pos(pdev, bar);
- if (pos < 0)
- return 0;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
- cap = FIELD_GET(PCI_REBAR_CAP_SIZES, cap);
-
- /* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
- if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
- bar == 0 && cap == 0x700)
- return 0x3f00;
-
- return cap;
-}
-EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
-
-/**
- * pci_rebar_get_current_size - get the current size of a BAR
- * @pdev: PCI device
- * @bar: BAR to set size to
- *
- * Read the size of a BAR from the resizable BAR config.
- * Returns size if found or negative error code.
- */
-int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
-{
- int pos;
- u32 ctrl;
-
- pos = pci_rebar_find_pos(pdev, bar);
- if (pos < 0)
- return pos;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- return FIELD_GET(PCI_REBAR_CTRL_BAR_SIZE, ctrl);
-}
-
-/**
- * pci_rebar_set_size - set a new size for a BAR
- * @pdev: PCI device
- * @bar: BAR to set size to
- * @size: new size as defined in the spec (0=1MB, 31=128TB)
- *
- * Set the new size of a BAR as defined in the spec.
- * Returns zero if resizing was successful, error code otherwise.
- */
-int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
-{
- int pos;
- u32 ctrl;
-
- pos = pci_rebar_find_pos(pdev, bar);
- if (pos < 0)
- return pos;
-
- pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
- ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
- ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);
- pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
- return 0;
-}
-
/**
* pci_enable_atomic_ops_to_root - enable AtomicOp requests to root port
* @dev: the PCI device
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 4492b809094b..fffd0a0cc803 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -1020,6 +1020,7 @@ static inline int acpi_get_rc_resources(struct device *dev, const char *hid,
#endif
void pci_rebar_init(struct pci_dev *pdev);
+void pci_restore_rebar_state(struct pci_dev *pdev);
int pci_rebar_get_current_size(struct pci_dev *pdev, int bar);
int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size);
static inline u64 pci_rebar_size_to_bytes(int size)
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
new file mode 100644
index 000000000000..8deee5bb33fa
--- /dev/null
+++ b/drivers/pci/rebar.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PCI Resizable BAR Extended Capability handling.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/errno.h>
+#include <linux/export.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+
+#include "pci.h"
+
+void pci_rebar_init(struct pci_dev *pdev)
+{
+ pdev->rebar_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR);
+}
+
+/**
+ * pci_rebar_find_pos - find position of resize ctrl reg for BAR
+ * @pdev: PCI device
+ * @bar: BAR to find
+ *
+ * Helper to find the position of the ctrl register for a BAR.
+ * Returns -ENOTSUPP if resizable BARs are not supported at all.
+ * Returns -ENOENT if no ctrl register for the BAR could be found.
+ */
+static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
+{
+ unsigned int pos, nbars, i;
+ u32 ctrl;
+
+ if (pci_resource_is_iov(bar)) {
+ pos = pci_iov_vf_rebar_cap(pdev);
+ bar = pci_resource_num_to_vf_bar(bar);
+ } else {
+ pos = pdev->rebar_cap;
+ }
+
+ if (!pos)
+ return -ENOTSUPP;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);
+
+ for (i = 0; i < nbars; i++, pos += 8) {
+ int bar_idx;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ bar_idx = FIELD_GET(PCI_REBAR_CTRL_BAR_IDX, ctrl);
+ if (bar_idx == bar)
+ return pos;
+ }
+
+ return -ENOENT;
+}
+
+/**
+ * pci_rebar_get_possible_sizes - get possible sizes for BAR
+ * @pdev: PCI device
+ * @bar: BAR to query
+ *
+ * Get the possible sizes of a resizable BAR as bitmask defined in the spec
+ * (bit 0=1MB, bit 31=128TB). Returns 0 if BAR isn't resizable.
+ */
+u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
+{
+ int pos;
+ u32 cap;
+
+ pos = pci_rebar_find_pos(pdev, bar);
+ if (pos < 0)
+ return 0;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
+ cap = FIELD_GET(PCI_REBAR_CAP_SIZES, cap);
+
+ /* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */
+ if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f &&
+ bar == 0 && cap == 0x700)
+ return 0x3f00;
+
+ return cap;
+}
+EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
+
+/**
+ * pci_rebar_get_current_size - get the current size of a BAR
+ * @pdev: PCI device
+ * @bar: BAR to set size to
+ *
+ * Read the size of a BAR from the resizable BAR config.
+ * Returns size if found or negative error code.
+ */
+int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
+{
+ int pos;
+ u32 ctrl;
+
+ pos = pci_rebar_find_pos(pdev, bar);
+ if (pos < 0)
+ return pos;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ return FIELD_GET(PCI_REBAR_CTRL_BAR_SIZE, ctrl);
+}
+
+/**
+ * pci_rebar_set_size - set a new size for a BAR
+ * @pdev: PCI device
+ * @bar: BAR to set size to
+ * @size: new size as defined in the spec (0=1MB, 31=128TB)
+ *
+ * Set the new size of a BAR as defined in the spec.
+ * Returns zero if resizing was successful, error code otherwise.
+ */
+int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
+{
+ int pos;
+ u32 ctrl;
+
+ pos = pci_rebar_find_pos(pdev, bar);
+ if (pos < 0)
+ return pos;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
+ ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);
+ pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
+ return 0;
+}
+
+void pci_restore_rebar_state(struct pci_dev *pdev)
+{
+ unsigned int pos, nbars, i;
+ u32 ctrl;
+
+ pos = pdev->rebar_cap;
+ if (!pos)
+ return;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ nbars = FIELD_GET(PCI_REBAR_CTRL_NBAR_MASK, ctrl);
+
+ for (i = 0; i < nbars; i++, pos += 8) {
+ struct resource *res;
+ int bar_idx, size;
+
+ pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
+ bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;
+ res = pci_resource_n(pdev, bar_idx);
+ size = pci_rebar_bytes_to_size(resource_size(res));
+ ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
+ ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);
+ pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
+ }
+}
+
+static bool pci_resize_is_memory_decoding_enabled(struct pci_dev *dev,
+ int resno)
+{
+ u16 cmd;
+
+ if (pci_resource_is_iov(resno))
+ return pci_iov_is_memory_decoding_enabled(dev);
+
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+
+ return cmd & PCI_COMMAND_MEMORY;
+}
+
+static void pci_resize_resource_set_size(struct pci_dev *dev, int resno,
+ int size)
+{
+ resource_size_t res_size = pci_rebar_size_to_bytes(size);
+ struct resource *res = pci_resource_n(dev, resno);
+
+ if (!pci_resource_is_iov(resno)) {
+ resource_set_size(res, res_size);
+ } else {
+ resource_set_size(res, res_size * pci_sriov_get_totalvfs(dev));
+ pci_iov_resource_set_size(dev, resno, res_size);
+ }
+}
+
+int pci_resize_resource(struct pci_dev *dev, int resno, int size)
+{
+ struct resource *res = pci_resource_n(dev, resno);
+ struct pci_host_bridge *host;
+ int old, ret;
+ u32 sizes;
+
+ /* Check if we must preserve the firmware's resource assignment */
+ host = pci_find_host_bridge(dev->bus);
+ if (host->preserve_config)
+ return -ENOTSUPP;
+
+ /* Make sure the resource isn't assigned before resizing it. */
+ if (!(res->flags & IORESOURCE_UNSET))
+ return -EBUSY;
+
+ if (pci_resize_is_memory_decoding_enabled(dev, resno))
+ return -EBUSY;
+
+ sizes = pci_rebar_get_possible_sizes(dev, resno);
+ if (!sizes)
+ return -ENOTSUPP;
+
+ if (!(sizes & BIT(size)))
+ return -EINVAL;
+
+ old = pci_rebar_get_current_size(dev, resno);
+ if (old < 0)
+ return old;
+
+ ret = pci_rebar_set_size(dev, resno, size);
+ if (ret)
+ return ret;
+
+ pci_resize_resource_set_size(dev, resno, size);
+
+ /* Check if the new config works by trying to assign everything. */
+ if (dev->bus->self) {
+ ret = pbus_reassign_bridge_resources(dev->bus, res);
+ if (ret)
+ goto error_resize;
+ }
+ return 0;
+
+error_resize:
+ pci_rebar_set_size(dev, resno, old);
+ pci_resize_resource_set_size(dev, resno, old);
+ return ret;
+}
+EXPORT_SYMBOL(pci_resize_resource);
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index c3ba4ccecd43..e5fcadfc58b0 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -431,84 +431,6 @@ int pci_release_resource(struct pci_dev *dev, int resno)
}
EXPORT_SYMBOL(pci_release_resource);
-static bool pci_resize_is_memory_decoding_enabled(struct pci_dev *dev,
- int resno)
-{
- u16 cmd;
-
- if (pci_resource_is_iov(resno))
- return pci_iov_is_memory_decoding_enabled(dev);
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
-
- return cmd & PCI_COMMAND_MEMORY;
-}
-
-static void pci_resize_resource_set_size(struct pci_dev *dev, int resno,
- int size)
-{
- resource_size_t res_size = pci_rebar_size_to_bytes(size);
- struct resource *res = pci_resource_n(dev, resno);
-
- if (!pci_resource_is_iov(resno)) {
- resource_set_size(res, res_size);
- } else {
- resource_set_size(res, res_size * pci_sriov_get_totalvfs(dev));
- pci_iov_resource_set_size(dev, resno, res_size);
- }
-}
-
-int pci_resize_resource(struct pci_dev *dev, int resno, int size)
-{
- struct resource *res = pci_resource_n(dev, resno);
- struct pci_host_bridge *host;
- int old, ret;
- u32 sizes;
-
- /* Check if we must preserve the firmware's resource assignment */
- host = pci_find_host_bridge(dev->bus);
- if (host->preserve_config)
- return -ENOTSUPP;
-
- /* Make sure the resource isn't assigned before resizing it. */
- if (!(res->flags & IORESOURCE_UNSET))
- return -EBUSY;
-
- if (pci_resize_is_memory_decoding_enabled(dev, resno))
- return -EBUSY;
-
- sizes = pci_rebar_get_possible_sizes(dev, resno);
- if (!sizes)
- return -ENOTSUPP;
-
- if (!(sizes & BIT(size)))
- return -EINVAL;
-
- old = pci_rebar_get_current_size(dev, resno);
- if (old < 0)
- return old;
-
- ret = pci_rebar_set_size(dev, resno, size);
- if (ret)
- return ret;
-
- pci_resize_resource_set_size(dev, resno, size);
-
- /* Check if the new config works by trying to assign everything. */
- if (dev->bus->self) {
- ret = pbus_reassign_bridge_resources(dev->bus, res);
- if (ret)
- goto error_resize;
- }
- return 0;
-
-error_resize:
- pci_rebar_set_size(dev, resno, old);
- pci_resize_resource_set_size(dev, resno, old);
- return ret;
-}
-EXPORT_SYMBOL(pci_resize_resource);
-
int pci_enable_resources(struct pci_dev *dev, int mask)
{
u16 cmd, old_cmd;
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 02/11] PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 01/11] PCI: Move Resizable BAR code into rebar.c Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 03/11] PCI: Move pci_rebar_size_to_bytes() and export it Ilpo Järvinen
` (10 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
Move pci_rebar_bytes_to_size() from include/linux/pci.h into rebar.c as
it does not look very trivial and is not expected to be performance
critical.
Convert literals to use a newly added PCI_REBAR_MIN_SIZE define.
Also add kernel doc for the function as the function is exported.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michael J. Ruhl <mjruhl@habana.ai>
---
drivers/pci/rebar.c | 23 +++++++++++++++++++++++
include/linux/pci.h | 10 +++-------
2 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 8deee5bb33fa..342b47022a5a 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -7,11 +7,34 @@
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/ioport.h>
+#include <linux/log2.h>
#include <linux/pci.h>
+#include <linux/sizes.h>
#include <linux/types.h>
#include "pci.h"
+#define PCI_REBAR_MIN_SIZE ((resource_size_t)SZ_1M)
+
+/**
+ * pci_rebar_bytes_to_size - Convert size in bytes to PCI BAR Size
+ * @bytes: size in bytes
+ *
+ * Convert bytes to BAR Size in Resizable BAR Capability (PCIe r6.2,
+ * sec. 7.8.6.3).
+ *
+ * Return: BAR Size as defined in the PCIe spec (0=1MB, 31=128TB).
+ */
+int pci_rebar_bytes_to_size(u64 bytes)
+{
+ int rebar_minsize = ilog2(PCI_REBAR_MIN_SIZE);
+
+ bytes = roundup_pow_of_two(bytes);
+
+ return max(ilog2(bytes), rebar_minsize) - rebar_minsize;
+}
+EXPORT_SYMBOL_GPL(pci_rebar_bytes_to_size);
+
void pci_rebar_init(struct pci_dev *pdev)
{
pdev->rebar_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index d1fdf81fbe1e..540221d0df0b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1419,16 +1419,12 @@ void pcibios_reset_secondary_bus(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, int resno);
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
int pci_release_resource(struct pci_dev *dev, int resno);
-static inline int pci_rebar_bytes_to_size(u64 bytes)
-{
- bytes = roundup_pow_of_two(bytes);
-
- /* Return BAR size as defined in the resizable BAR specification */
- return max(ilog2(bytes), 20) - 20;
-}
+/* Resizable BAR related routines */
+int pci_rebar_bytes_to_size(u64 bytes);
u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size);
+
int pci_select_bars(struct pci_dev *dev, unsigned long flags);
bool pci_device_is_present(struct pci_dev *pdev);
void pci_ignore_hotplug(struct pci_dev *dev);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 03/11] PCI: Move pci_rebar_size_to_bytes() and export it
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 01/11] PCI: Move Resizable BAR code into rebar.c Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 02/11] PCI: Cleanup pci_rebar_bytes_to_size() and move " Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 04/11] PCI: Improve Resizable BAR functions kernel doc Ilpo Järvinen
` (9 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
pci_rebar_size_to_bytes() is in drivers/pci/pci.h but would be useful
for endpoint drivers as well.
Move the function into rebar.c and export it.
In addition, convert the literal to where the number comes from
(PCI_REBAR_MIN_SIZE).
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/pci/pci.h | 4 ----
drivers/pci/rebar.c | 12 ++++++++++++
include/linux/pci.h | 1 +
3 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index fffd0a0cc803..939a3a84b06e 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -1023,10 +1023,6 @@ void pci_rebar_init(struct pci_dev *pdev);
void pci_restore_rebar_state(struct pci_dev *pdev);
int pci_rebar_get_current_size(struct pci_dev *pdev, int bar);
int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size);
-static inline u64 pci_rebar_size_to_bytes(int size)
-{
- return 1ULL << (size + 20);
-}
struct device_node;
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 342b47022a5a..1d30dbb7fe82 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -35,6 +35,18 @@ int pci_rebar_bytes_to_size(u64 bytes)
}
EXPORT_SYMBOL_GPL(pci_rebar_bytes_to_size);
+/**
+ * pci_rebar_size_to_bytes - Convert BAR Size to bytes
+ * @size: BAR Size as defined in the PCIe spec (0=1MB, 31=128TB)
+ *
+ * Return: BAR size in bytes.
+ */
+resource_size_t pci_rebar_size_to_bytes(int size)
+{
+ return 1ULL << (size + ilog2(PCI_REBAR_MIN_SIZE));
+}
+EXPORT_SYMBOL_GPL(pci_rebar_size_to_bytes);
+
void pci_rebar_init(struct pci_dev *pdev)
{
pdev->rebar_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 540221d0df0b..0a50912c5ce5 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1422,6 +1422,7 @@ int pci_release_resource(struct pci_dev *dev, int resno);
/* Resizable BAR related routines */
int pci_rebar_bytes_to_size(u64 bytes);
+resource_size_t pci_rebar_size_to_bytes(int size);
u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 04/11] PCI: Improve Resizable BAR functions kernel doc
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (2 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 03/11] PCI: Move pci_rebar_size_to_bytes() and export it Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 05/11] PCI: Add pci_rebar_size_supported() helper Ilpo Järvinen
` (8 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
Fix the copy-pasted errors in the Resizable BAR handling functions
kernel doc and generally improve wording choices.
Fix the formatting errors of the Return: line.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/pci/rebar.c | 35 +++++++++++++++++++++--------------
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 1d30dbb7fe82..17e7b664c4ce 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -53,13 +53,15 @@ void pci_rebar_init(struct pci_dev *pdev)
}
/**
- * pci_rebar_find_pos - find position of resize ctrl reg for BAR
+ * pci_rebar_find_pos - find position of resize control reg for BAR
* @pdev: PCI device
* @bar: BAR to find
*
- * Helper to find the position of the ctrl register for a BAR.
- * Returns -ENOTSUPP if resizable BARs are not supported at all.
- * Returns -ENOENT if no ctrl register for the BAR could be found.
+ * Helper to find the position of the control register for a BAR.
+ *
+ * Return:
+ * * %-ENOTSUPP if resizable BARs are not supported at all,
+ * * %-ENOENT if no control register for the BAR could be found.
*/
static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
{
@@ -92,12 +94,14 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
}
/**
- * pci_rebar_get_possible_sizes - get possible sizes for BAR
+ * pci_rebar_get_possible_sizes - get possible sizes for Resizable BAR
* @pdev: PCI device
* @bar: BAR to query
*
- * Get the possible sizes of a resizable BAR as bitmask defined in the spec
- * (bit 0=1MB, bit 31=128TB). Returns 0 if BAR isn't resizable.
+ * Get the possible sizes of a resizable BAR as bitmask.
+ *
+ * Return: A bitmask of possible sizes (bit 0=1MB, bit 31=128TB), or %0 if
+ * BAR isn't resizable.
*/
u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
{
@@ -121,12 +125,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
/**
- * pci_rebar_get_current_size - get the current size of a BAR
+ * pci_rebar_get_current_size - get the current size of a Resizable BAR
* @pdev: PCI device
- * @bar: BAR to set size to
+ * @bar: BAR to get the size from
*
- * Read the size of a BAR from the resizable BAR config.
- * Returns size if found or negative error code.
+ * Reads the current size of a BAR from the Resizable BAR config.
+ *
+ * Return: BAR Size if @bar is resizable (0=1MB, 31=128TB), or negative on
+ * error.
*/
int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
{
@@ -142,13 +148,14 @@ int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
}
/**
- * pci_rebar_set_size - set a new size for a BAR
+ * pci_rebar_set_size - set a new size for a Resizable BAR
* @pdev: PCI device
* @bar: BAR to set size to
- * @size: new size as defined in the spec (0=1MB, 31=128TB)
+ * @size: new size as defined in the PCIe spec (0=1MB, 31=128TB)
*
* Set the new size of a BAR as defined in the spec.
- * Returns zero if resizing was successful, error code otherwise.
+ *
+ * Return: %0 if resizing was successful, or negative on error.
*/
int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
{
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 05/11] PCI: Add pci_rebar_size_supported() helper
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (3 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 04/11] PCI: Improve Resizable BAR functions kernel doc Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 06/11] drm/i915/gt: Use pci_rebar_size_supported() Ilpo Järvinen
` (7 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
Many callers of pci_rebar_get_possible_sizes() are interested in
finding out if a particular BAR Size (PCIe r6.2 sec. 7.8.6.3) is
supported by the particular BAR.
Add pci_rebar_size_supported() into PCI core to make it easy for the
drivers to determine if the BAR Size is supported or not.
Use the new function in pci_resize_resource() and in
pci_iov_vf_bar_set_size().
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/pci/iov.c | 7 +------
drivers/pci/rebar.c | 25 +++++++++++++++++++------
include/linux/pci.h | 1 +
3 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 77dee43b7858..02f4e9cd3fbe 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -1339,7 +1339,6 @@ EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);
*/
int pci_iov_vf_bar_set_size(struct pci_dev *dev, int resno, int size)
{
- u32 sizes;
int ret;
if (!pci_resource_is_iov(resno))
@@ -1348,11 +1347,7 @@ int pci_iov_vf_bar_set_size(struct pci_dev *dev, int resno, int size)
if (pci_iov_is_memory_decoding_enabled(dev))
return -EBUSY;
- sizes = pci_rebar_get_possible_sizes(dev, resno);
- if (!sizes)
- return -ENOTSUPP;
-
- if (!(sizes & BIT(size)))
+ if (!pci_rebar_size_supported(dev, resno, size))
return -EINVAL;
ret = pci_rebar_set_size(dev, resno, size);
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 17e7b664c4ce..067cd75b394b 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -3,6 +3,7 @@
* PCI Resizable BAR Extended Capability handling.
*/
+#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/errno.h>
#include <linux/export.h>
@@ -124,6 +125,23 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
}
EXPORT_SYMBOL(pci_rebar_get_possible_sizes);
+/**
+ * pci_rebar_size_supported - check if size is supported for BAR
+ * @pdev: PCI device
+ * @bar: BAR to check
+ * @size: size as defined in the PCIe spec (0=1MB, 31=128TB)
+ *
+ * Return: %true if @bar is resizable and @size is a supported, otherwise
+ * %false.
+ */
+bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size)
+{
+ u64 sizes = pci_rebar_get_possible_sizes(pdev, bar);
+
+ return BIT(size) & sizes;
+}
+EXPORT_SYMBOL_GPL(pci_rebar_size_supported);
+
/**
* pci_rebar_get_current_size - get the current size of a Resizable BAR
* @pdev: PCI device
@@ -231,7 +249,6 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size)
struct resource *res = pci_resource_n(dev, resno);
struct pci_host_bridge *host;
int old, ret;
- u32 sizes;
/* Check if we must preserve the firmware's resource assignment */
host = pci_find_host_bridge(dev->bus);
@@ -245,11 +262,7 @@ int pci_resize_resource(struct pci_dev *dev, int resno, int size)
if (pci_resize_is_memory_decoding_enabled(dev, resno))
return -EBUSY;
- sizes = pci_rebar_get_possible_sizes(dev, resno);
- if (!sizes)
- return -ENOTSUPP;
-
- if (!(sizes & BIT(size)))
+ if (!pci_rebar_size_supported(dev, resno, size))
return -EINVAL;
old = pci_rebar_get_current_size(dev, resno);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 0a50912c5ce5..cf833daddaee 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1424,6 +1424,7 @@ int pci_release_resource(struct pci_dev *dev, int resno);
int pci_rebar_bytes_to_size(u64 bytes);
resource_size_t pci_rebar_size_to_bytes(int size);
u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
+bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size);
int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size);
int pci_select_bars(struct pci_dev *dev, unsigned long flags);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 06/11] drm/i915/gt: Use pci_rebar_size_supported()
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (4 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 05/11] PCI: Add pci_rebar_size_supported() helper Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 07/11] drm/xe/vram: Use PCI rebar helpers in resize_vram_bar() Ilpo Järvinen
` (6 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen, Jani Nikula
PCI core provides pci_rebar_size_supported() that helps in checking if
a BAR Size is supported for the BAR or not. Use it in
i915_resize_lmem_bar() to simplify code.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 51bb27e10a4f..69c65fc8a72d 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -61,16 +61,12 @@ static void i915_resize_lmem_bar(struct drm_i915_private *i915, resource_size_t
current_size = roundup_pow_of_two(pci_resource_len(pdev, GEN12_LMEM_BAR));
if (i915->params.lmem_bar_size) {
- u32 bar_sizes;
-
- rebar_size = i915->params.lmem_bar_size *
- (resource_size_t)SZ_1M;
- bar_sizes = pci_rebar_get_possible_sizes(pdev, GEN12_LMEM_BAR);
-
+ rebar_size = i915->params.lmem_bar_size * (resource_size_t)SZ_1M;
if (rebar_size == current_size)
return;
- if (!(bar_sizes & BIT(pci_rebar_bytes_to_size(rebar_size))) ||
+ if (!pci_rebar_size_supported(pdev, GEN12_LMEM_BAR,
+ pci_rebar_bytes_to_size(rebar_size)) ||
rebar_size >= roundup_pow_of_two(lmem_size)) {
rebar_size = lmem_size;
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 07/11] drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (5 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 06/11] drm/i915/gt: Use pci_rebar_size_supported() Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 08/11] PCI: Add pci_rebar_get_max_size() Ilpo Järvinen
` (5 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
Thomas Hellström, linux-kernel
Cc: Ilpo Järvinen
PCI core provides pci_rebar_size_supported() and
pci_rebar_size_to_bytes(), use them in resize_vram_bar() to simplify
code.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_vram.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index b44ebf50fedb..9ac053bb0b2e 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -24,8 +24,6 @@
#include "xe_vram.h"
#include "xe_vram_types.h"
-#define BAR_SIZE_SHIFT 20
-
static void
_resize_bar(struct xe_device *xe, int resno, resource_size_t size)
{
@@ -74,25 +72,22 @@ static void resize_vram_bar(struct xe_device *xe)
/* set to a specific size? */
if (force_vram_bar_size) {
- u32 bar_size_bit;
-
- rebar_size = force_vram_bar_size * (resource_size_t)SZ_1M;
+ rebar_size = pci_rebar_bytes_to_size(force_vram_bar_size *
+ (resource_size_t)SZ_1M);
- bar_size_bit = bar_size_mask & BIT(pci_rebar_bytes_to_size(rebar_size));
-
- if (!bar_size_bit) {
+ if (!pci_rebar_size_supported(pdev, LMEM_BAR, rebar_size)) {
drm_info(&xe->drm,
"Requested size: %lluMiB is not supported by rebar sizes: 0x%x. Leaving default: %lluMiB\n",
- (u64)rebar_size >> 20, bar_size_mask, (u64)current_size >> 20);
+ (u64)pci_rebar_size_to_bytes(rebar_size) >> 20,
+ bar_size_mask, (u64)current_size >> 20);
return;
}
- rebar_size = 1ULL << (__fls(bar_size_bit) + BAR_SIZE_SHIFT);
-
+ rebar_size = pci_rebar_size_to_bytes(rebar_size);
if (rebar_size == current_size)
return;
} else {
- rebar_size = 1ULL << (__fls(bar_size_mask) + BAR_SIZE_SHIFT);
+ rebar_size = pci_rebar_size_to_bytes(__fls(bar_size_mask));
/* only resize if larger than current */
if (rebar_size <= current_size)
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 08/11] PCI: Add pci_rebar_get_max_size()
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (6 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 07/11] drm/xe/vram: Use PCI rebar helpers in resize_vram_bar() Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 09/11] drm/xe/vram: Use pci_rebar_get_max_size() Ilpo Järvinen
` (4 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
Add pci_rebar_get_max_size() into PCI core to allow simplifying code
that wants to know the maximum possible size for a Resizable BAR.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/pci/rebar.c | 23 +++++++++++++++++++++++
include/linux/pci.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 067cd75b394b..1c30beb80f85 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -5,6 +5,7 @@
#include <linux/bits.h>
#include <linux/bitfield.h>
+#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/ioport.h>
@@ -142,6 +143,28 @@ bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size)
}
EXPORT_SYMBOL_GPL(pci_rebar_size_supported);
+/**
+ * pci_rebar_get_max_size - get the maximum supported size of a BAR
+ * @pdev: PCI device
+ * @bar: BAR to query
+ *
+ * Get the largest supported size of a resizable BAR as a size.
+ *
+ * Returns: the maximum BAR size as defined in the PCIe spec (0=1MB, 31=128TB),
+ * or %-NOENT on error.
+ */
+int pci_rebar_get_max_size(struct pci_dev *pdev, int bar)
+{
+ u32 sizes;
+
+ sizes = pci_rebar_get_possible_sizes(pdev, bar);
+ if (!sizes)
+ return -ENOENT;
+
+ return __fls(sizes);
+}
+EXPORT_SYMBOL_GPL(pci_rebar_get_max_size);
+
/**
* pci_rebar_get_current_size - get the current size of a Resizable BAR
* @pdev: PCI device
diff --git a/include/linux/pci.h b/include/linux/pci.h
index cf833daddaee..61dcf5ff7df6 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1425,6 +1425,7 @@ int pci_rebar_bytes_to_size(u64 bytes);
resource_size_t pci_rebar_size_to_bytes(int size);
u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size);
+int pci_rebar_get_max_size(struct pci_dev *pdev, int bar);
int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size);
int pci_select_bars(struct pci_dev *dev, unsigned long flags);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 09/11] drm/xe/vram: Use pci_rebar_get_max_size()
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (7 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 08/11] PCI: Add pci_rebar_get_max_size() Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 10/11] drm/amdgpu: " Ilpo Järvinen
` (3 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
Thomas Hellström, linux-kernel
Cc: Ilpo Järvinen
Use pci_rebar_get_max_size() from PCI core in resize_vram_bar() to
simplify code.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_vram.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 9ac053bb0b2e..55232dfe2cd8 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -56,16 +56,11 @@ static void resize_vram_bar(struct xe_device *xe)
resource_size_t current_size;
resource_size_t rebar_size;
struct resource *root_res;
- u32 bar_size_mask;
+ int max_size, i;
u32 pci_cmd;
- int i;
/* gather some relevant info */
current_size = pci_resource_len(pdev, LMEM_BAR);
- bar_size_mask = pci_rebar_get_possible_sizes(pdev, LMEM_BAR);
-
- if (!bar_size_mask)
- return;
if (force_vram_bar_size < 0)
return;
@@ -79,7 +74,8 @@ static void resize_vram_bar(struct xe_device *xe)
drm_info(&xe->drm,
"Requested size: %lluMiB is not supported by rebar sizes: 0x%x. Leaving default: %lluMiB\n",
(u64)pci_rebar_size_to_bytes(rebar_size) >> 20,
- bar_size_mask, (u64)current_size >> 20);
+ pci_rebar_get_possible_sizes(pdev, LMEM_BAR),
+ (u64)current_size >> 20);
return;
}
@@ -87,7 +83,10 @@ static void resize_vram_bar(struct xe_device *xe)
if (rebar_size == current_size)
return;
} else {
- rebar_size = pci_rebar_size_to_bytes(__fls(bar_size_mask));
+ max_size = pci_rebar_get_max_size(pdev, LMEM_BAR);
+ if (max_size < 0)
+ return;
+ rebar_size = pci_rebar_size_to_bytes(max_size);
/* only resize if larger than current */
if (rebar_size <= current_size)
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 10/11] drm/amdgpu: Use pci_rebar_get_max_size()
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (8 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 09/11] drm/xe/vram: Use pci_rebar_get_max_size() Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 13:33 ` [PATCH v3 11/11] PCI: Convert BAR sizes bitmasks to u64 Ilpo Järvinen
` (2 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
Cc: Ilpo Järvinen
Use pci_rebar_get_max_size() from PCI core to simplify code in
amdgpu_device_resize_fb_bar().
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a77000c2e0bb..f2c4f6996c23 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1673,9 +1673,9 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
int rbar_size = pci_rebar_bytes_to_size(adev->gmc.real_vram_size);
struct pci_bus *root;
struct resource *res;
+ int max_size, r;
unsigned int i;
u16 cmd;
- int r;
if (!IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT))
return 0;
@@ -1721,8 +1721,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
return 0;
/* Limit the BAR size to what is available */
- rbar_size = min(fls(pci_rebar_get_possible_sizes(adev->pdev, 0)) - 1,
- rbar_size);
+ max_size = pci_rebar_get_max_size(adev->pdev, 0);
+ if (max_size < 0)
+ return 0;
+ rbar_size = min(max_size, rbar_size);
/* Disable memory decoding while we change the BAR addresses and size */
pci_read_config_word(adev->pdev, PCI_COMMAND, &cmd);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v3 11/11] PCI: Convert BAR sizes bitmasks to u64
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (9 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 10/11] drm/amdgpu: " Ilpo Järvinen
@ 2025-10-22 13:33 ` Ilpo Järvinen
2025-10-22 16:59 ` ✗ Fi.CI.BUILD: failure for PCI: Resizable BAR improvements (rev4) Patchwork
2025-10-23 21:29 ` [PATCH v3 00/11] PCI: Resizable BAR improvements Bjorn Helgaas
12 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-22 13:33 UTC (permalink / raw)
To: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
Thomas Hellström, linux-kernel
Cc: Ilpo Järvinen
PCIe r6.2 section 7.8.6 defines resizable BAR sizes beyond the
currently supported maximum of 128TB which will require more than u32
to store the entire bitmask.
Convert Resizable BAR related functions to use u64 bitmask for BAR
sizes to make the typing more future-proof.
The support for the larger BAR sizes themselves is not added at this
point.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/xe/xe_vram.c | 2 +-
drivers/pci/iov.c | 2 +-
drivers/pci/pci-sysfs.c | 2 +-
drivers/pci/rebar.c | 4 ++--
include/linux/pci.h | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 55232dfe2cd8..f18232668810 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -72,7 +72,7 @@ static void resize_vram_bar(struct xe_device *xe)
if (!pci_rebar_size_supported(pdev, LMEM_BAR, rebar_size)) {
drm_info(&xe->drm,
- "Requested size: %lluMiB is not supported by rebar sizes: 0x%x. Leaving default: %lluMiB\n",
+ "Requested size: %lluMiB is not supported by rebar sizes: 0x%llx. Leaving default: %lluMiB\n",
(u64)pci_rebar_size_to_bytes(rebar_size) >> 20,
pci_rebar_get_possible_sizes(pdev, LMEM_BAR),
(u64)current_size >> 20);
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 02f4e9cd3fbe..c09f7caa49a4 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -1375,7 +1375,7 @@ EXPORT_SYMBOL_GPL(pci_iov_vf_bar_set_size);
u32 pci_iov_vf_bar_get_sizes(struct pci_dev *dev, int resno, int num_vfs)
{
u64 vf_len = pci_resource_len(dev, resno);
- u32 sizes;
+ u64 sizes;
if (!num_vfs)
return 0;
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index af74cf02bb90..cb19983182b5 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -1586,7 +1586,7 @@ static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)
pci_config_pm_runtime_get(pdev);
ret = sysfs_emit(buf, "%016llx\n",
- (u64)pci_rebar_get_possible_sizes(pdev, n));
+ pci_rebar_get_possible_sizes(pdev, n));
pci_config_pm_runtime_put(pdev);
diff --git a/drivers/pci/rebar.c b/drivers/pci/rebar.c
index 1c30beb80f85..1488769071ed 100644
--- a/drivers/pci/rebar.c
+++ b/drivers/pci/rebar.c
@@ -105,7 +105,7 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
* Return: A bitmask of possible sizes (bit 0=1MB, bit 31=128TB), or %0 if
* BAR isn't resizable.
*/
-u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
+u64 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
{
int pos;
u32 cap;
@@ -155,7 +155,7 @@ EXPORT_SYMBOL_GPL(pci_rebar_size_supported);
*/
int pci_rebar_get_max_size(struct pci_dev *pdev, int bar)
{
- u32 sizes;
+ u64 sizes;
sizes = pci_rebar_get_possible_sizes(pdev, bar);
if (!sizes)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 61dcf5ff7df6..63d98b2a3e06 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1423,7 +1423,7 @@ int pci_release_resource(struct pci_dev *dev, int resno);
/* Resizable BAR related routines */
int pci_rebar_bytes_to_size(u64 bytes);
resource_size_t pci_rebar_size_to_bytes(int size);
-u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
+u64 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
bool pci_rebar_size_supported(struct pci_dev *pdev, int bar, int size);
int pci_rebar_get_max_size(struct pci_dev *pdev, int bar);
int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size);
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* ✗ Fi.CI.BUILD: failure for PCI: Resizable BAR improvements (rev4)
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (10 preceding siblings ...)
2025-10-22 13:33 ` [PATCH v3 11/11] PCI: Convert BAR sizes bitmasks to u64 Ilpo Järvinen
@ 2025-10-22 16:59 ` Patchwork
2025-10-23 21:29 ` [PATCH v3 00/11] PCI: Resizable BAR improvements Bjorn Helgaas
12 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2025-10-22 16:59 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: PCI: Resizable BAR improvements (rev4)
URL : https://patchwork.freedesktop.org/series/154362/
State : failure
== Summary ==
Error: patch https://patchwork.freedesktop.org/api/1.0/series/154362/revisions/4/mbox/ not applied
Applying: PCI: Move Resizable BAR code into rebar.c
Applying: PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
Applying: PCI: Move pci_rebar_size_to_bytes() and export it
Applying: PCI: Improve Resizable BAR functions kernel doc
Applying: PCI: Add pci_rebar_size_supported() helper
Applying: drm/i915/gt: Use pci_rebar_size_supported()
Applying: drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
Using index info to reconstruct a base tree...
M drivers/gpu/drm/xe/xe_vram.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/xe/xe_vram.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/xe/xe_vram.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0007 drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v3 00/11] PCI: Resizable BAR improvements
2025-10-22 13:33 [PATCH v3 00/11] PCI: Resizable BAR improvements Ilpo Järvinen
` (11 preceding siblings ...)
2025-10-22 16:59 ` ✗ Fi.CI.BUILD: failure for PCI: Resizable BAR improvements (rev4) Patchwork
@ 2025-10-23 21:29 ` Bjorn Helgaas
2025-10-23 22:02 ` Lucas De Marchi
12 siblings, 1 reply; 17+ messages in thread
From: Bjorn Helgaas @ 2025-10-23 21:29 UTC (permalink / raw)
To: Ilpo Järvinen
Cc: linux-pci, Bjorn Helgaas, Krzysztof Wilczyński,
Christian König, Michał Winiarski, Alex Deucher,
amd-gfx, David Airlie, dri-devel, intel-gfx, intel-xe,
Jani Nikula, Joonas Lahtinen, Lucas De Marchi, Rodrigo Vivi,
Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl, Andi Shyti,
linux-kernel
On Wed, Oct 22, 2025 at 04:33:20PM +0300, Ilpo Järvinen wrote:
> pci.c has been used as catch everything that doesn't fits elsewhere
> within PCI core and thus resizable BAR code has been placed there as
> well. Move Resizable BAR related code to a newly introduced rebar.c to
> reduce size of pci.c. After move, there are no pci_rebar_*() calls from
> pci.c indicating this is indeed well-defined subset of PCI core.
>
> Endpoint drivers perform Resizable BAR related operations which could
> well be performed by PCI core to simplify driver-side code. This
> series adds a few new API functions to that effect and converts the
> drivers to use the new APIs (in separate patches).
>
> While at it, also convert BAR sizes bitmask to u64 as PCIe spec already
> specifies more sizes than what will fit u32 to make the API typing more
> future-proof. The extra sizes beyond 128TB are not added at this point.
>
> Some parts of this are to be used by the resizable BAR changes into the
> resource fitting/assingment logic but these seem to stand on their own
> so sending these out now to reduce the size of the other patch series.
>
> v3:
> - Rebased to solve minor conflicts
>
> v2: https://lore.kernel.org/linux-pci/20250915091358.9203-1-ilpo.jarvinen@linux.intel.com/
> - Kerneldoc:
> - Improve formatting of errno returns
> - Open "ctrl" -> "control"
> - Removed mislead "bit" words (when referring to BAR size)
> - Rewrote pci_rebar_get_possible_sizes() kernel doc to not claim the
> returned bitmask is defined in PCIe spec as the capability bits now
> span across two registers in the spec and are not continuous (we
> don't support the second block of bits yet, but this API is expected
> to return the bits without the hole so it will not be matching with
> the spec layout).
> - Dropped superfluous zero check from pci_rebar_size_supported()
> - Small improvement to changelog of patch 7
>
> Ilpo Järvinen (11):
> PCI: Move Resizable BAR code into rebar.c
> PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
> PCI: Move pci_rebar_size_to_bytes() and export it
> PCI: Improve Resizable BAR functions kernel doc
> PCI: Add pci_rebar_size_supported() helper
> drm/i915/gt: Use pci_rebar_size_supported()
> drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
> PCI: Add pci_rebar_get_max_size()
> drm/xe/vram: Use pci_rebar_get_max_size()
> drm/amdgpu: Use pci_rebar_get_max_size()
> PCI: Convert BAR sizes bitmasks to u64
>
> Documentation/driver-api/pci/pci.rst | 3 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +-
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +-
> drivers/gpu/drm/xe/xe_vram.c | 32 +-
> drivers/pci/Makefile | 2 +-
> drivers/pci/iov.c | 9 +-
> drivers/pci/pci-sysfs.c | 2 +-
> drivers/pci/pci.c | 145 ---------
> drivers/pci/pci.h | 5 +-
> drivers/pci/rebar.c | 314 ++++++++++++++++++++
> drivers/pci/setup-res.c | 78 -----
> include/linux/pci.h | 15 +-
> 12 files changed, 350 insertions(+), 273 deletions(-)
> create mode 100644 drivers/pci/rebar.c
Applied to pci/rebar for v6.18, thanks, Ilpo!
If we have follow-on resource assignment changes that depend on these,
maybe I'll rename the branch to be more generic before applying them.
Also applied the drivers/gpu changes based on the acks. I see the CI
merge failures since this series is based on v6.18-rc1; I assume the
CI applies to current linux-next or similar. I'll check the conflicts
later and we can defer those changes if needed.
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v3 00/11] PCI: Resizable BAR improvements
2025-10-23 21:29 ` [PATCH v3 00/11] PCI: Resizable BAR improvements Bjorn Helgaas
@ 2025-10-23 22:02 ` Lucas De Marchi
2025-10-23 22:13 ` Bjorn Helgaas
0 siblings, 1 reply; 17+ messages in thread
From: Lucas De Marchi @ 2025-10-23 22:02 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Ilpo Järvinen, linux-pci, Bjorn Helgaas,
Krzysztof Wilczyński, Christian König,
Michał Winiarski, Alex Deucher, amd-gfx, David Airlie,
dri-devel, intel-gfx, intel-xe, Jani Nikula, Joonas Lahtinen,
Rodrigo Vivi, Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl,
Andi Shyti, linux-kernel
On Thu, Oct 23, 2025 at 04:29:43PM -0500, Bjorn Helgaas wrote:
>On Wed, Oct 22, 2025 at 04:33:20PM +0300, Ilpo Järvinen wrote:
>> pci.c has been used as catch everything that doesn't fits elsewhere
>> within PCI core and thus resizable BAR code has been placed there as
>> well. Move Resizable BAR related code to a newly introduced rebar.c to
>> reduce size of pci.c. After move, there are no pci_rebar_*() calls from
>> pci.c indicating this is indeed well-defined subset of PCI core.
>>
>> Endpoint drivers perform Resizable BAR related operations which could
>> well be performed by PCI core to simplify driver-side code. This
>> series adds a few new API functions to that effect and converts the
>> drivers to use the new APIs (in separate patches).
>>
>> While at it, also convert BAR sizes bitmask to u64 as PCIe spec already
>> specifies more sizes than what will fit u32 to make the API typing more
>> future-proof. The extra sizes beyond 128TB are not added at this point.
>>
>> Some parts of this are to be used by the resizable BAR changes into the
>> resource fitting/assingment logic but these seem to stand on their own
>> so sending these out now to reduce the size of the other patch series.
>>
>> v3:
>> - Rebased to solve minor conflicts
>>
>> v2: https://lore.kernel.org/linux-pci/20250915091358.9203-1-ilpo.jarvinen@linux.intel.com/
>> - Kerneldoc:
>> - Improve formatting of errno returns
>> - Open "ctrl" -> "control"
>> - Removed mislead "bit" words (when referring to BAR size)
>> - Rewrote pci_rebar_get_possible_sizes() kernel doc to not claim the
>> returned bitmask is defined in PCIe spec as the capability bits now
>> span across two registers in the spec and are not continuous (we
>> don't support the second block of bits yet, but this API is expected
>> to return the bits without the hole so it will not be matching with
>> the spec layout).
>> - Dropped superfluous zero check from pci_rebar_size_supported()
>> - Small improvement to changelog of patch 7
>>
>> Ilpo Järvinen (11):
>> PCI: Move Resizable BAR code into rebar.c
>> PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
>> PCI: Move pci_rebar_size_to_bytes() and export it
>> PCI: Improve Resizable BAR functions kernel doc
>> PCI: Add pci_rebar_size_supported() helper
>> drm/i915/gt: Use pci_rebar_size_supported()
>> drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
>> PCI: Add pci_rebar_get_max_size()
>> drm/xe/vram: Use pci_rebar_get_max_size()
>> drm/amdgpu: Use pci_rebar_get_max_size()
>> PCI: Convert BAR sizes bitmasks to u64
>>
>> Documentation/driver-api/pci/pci.rst | 3 +
>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +-
>> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +-
>> drivers/gpu/drm/xe/xe_vram.c | 32 +-
>> drivers/pci/Makefile | 2 +-
>> drivers/pci/iov.c | 9 +-
>> drivers/pci/pci-sysfs.c | 2 +-
>> drivers/pci/pci.c | 145 ---------
>> drivers/pci/pci.h | 5 +-
>> drivers/pci/rebar.c | 314 ++++++++++++++++++++
>> drivers/pci/setup-res.c | 78 -----
>> include/linux/pci.h | 15 +-
>> 12 files changed, 350 insertions(+), 273 deletions(-)
>> create mode 100644 drivers/pci/rebar.c
>
>Applied to pci/rebar for v6.18, thanks, Ilpo!
is this for v6.18 or it's a typo and it's going to v6.19?
>
>If we have follow-on resource assignment changes that depend on these,
>maybe I'll rename the branch to be more generic before applying them.
>
>Also applied the drivers/gpu changes based on the acks. I see the CI
>merge failures since this series is based on v6.18-rc1; I assume the
>CI applies to current linux-next or similar. I'll check the conflicts
it tries on drm-tip that contains drm-xe-next going to v6.19. We have
some changes there that conflict, but shouldn't be hard.
We also need https://lore.kernel.org/linux-pci/20250918-xe-pci-rebar-2-v1-1-6c094702a074@intel.com/
to actually fix the rebar in some cases. Could you take a look?
thanks
Lucas De Marchi
>later and we can defer those changes if needed.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v3 00/11] PCI: Resizable BAR improvements
2025-10-23 22:02 ` Lucas De Marchi
@ 2025-10-23 22:13 ` Bjorn Helgaas
2025-10-24 10:39 ` Ilpo Järvinen
0 siblings, 1 reply; 17+ messages in thread
From: Bjorn Helgaas @ 2025-10-23 22:13 UTC (permalink / raw)
To: Lucas De Marchi
Cc: Ilpo Järvinen, linux-pci, Bjorn Helgaas,
Krzysztof Wilczyński, Christian König,
Michał Winiarski, Alex Deucher, amd-gfx, David Airlie,
dri-devel, intel-gfx, intel-xe, Jani Nikula, Joonas Lahtinen,
Rodrigo Vivi, Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl,
Andi Shyti, linux-kernel
On Thu, Oct 23, 2025 at 05:02:42PM -0500, Lucas De Marchi wrote:
> On Thu, Oct 23, 2025 at 04:29:43PM -0500, Bjorn Helgaas wrote:
> > On Wed, Oct 22, 2025 at 04:33:20PM +0300, Ilpo Järvinen wrote:
> > > pci.c has been used as catch everything that doesn't fits elsewhere
> > > within PCI core and thus resizable BAR code has been placed there as
> > > well. Move Resizable BAR related code to a newly introduced rebar.c to
> > > reduce size of pci.c. After move, there are no pci_rebar_*() calls from
> > > pci.c indicating this is indeed well-defined subset of PCI core.
> > >
> > > Endpoint drivers perform Resizable BAR related operations which could
> > > well be performed by PCI core to simplify driver-side code. This
> > > series adds a few new API functions to that effect and converts the
> > > drivers to use the new APIs (in separate patches).
> > >
> > > While at it, also convert BAR sizes bitmask to u64 as PCIe spec already
> > > specifies more sizes than what will fit u32 to make the API typing more
> > > future-proof. The extra sizes beyond 128TB are not added at this point.
> > >
> > > Some parts of this are to be used by the resizable BAR changes into the
> > > resource fitting/assingment logic but these seem to stand on their own
> > > so sending these out now to reduce the size of the other patch series.
> > >
> > > v3:
> > > - Rebased to solve minor conflicts
> > >
> > > v2: https://lore.kernel.org/linux-pci/20250915091358.9203-1-ilpo.jarvinen@linux.intel.com/
> > > - Kerneldoc:
> > > - Improve formatting of errno returns
> > > - Open "ctrl" -> "control"
> > > - Removed mislead "bit" words (when referring to BAR size)
> > > - Rewrote pci_rebar_get_possible_sizes() kernel doc to not claim the
> > > returned bitmask is defined in PCIe spec as the capability bits now
> > > span across two registers in the spec and are not continuous (we
> > > don't support the second block of bits yet, but this API is expected
> > > to return the bits without the hole so it will not be matching with
> > > the spec layout).
> > > - Dropped superfluous zero check from pci_rebar_size_supported()
> > > - Small improvement to changelog of patch 7
> > >
> > > Ilpo Järvinen (11):
> > > PCI: Move Resizable BAR code into rebar.c
> > > PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
> > > PCI: Move pci_rebar_size_to_bytes() and export it
> > > PCI: Improve Resizable BAR functions kernel doc
> > > PCI: Add pci_rebar_size_supported() helper
> > > drm/i915/gt: Use pci_rebar_size_supported()
> > > drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
> > > PCI: Add pci_rebar_get_max_size()
> > > drm/xe/vram: Use pci_rebar_get_max_size()
> > > drm/amdgpu: Use pci_rebar_get_max_size()
> > > PCI: Convert BAR sizes bitmasks to u64
> > >
> > > Documentation/driver-api/pci/pci.rst | 3 +
> > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +-
> > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +-
> > > drivers/gpu/drm/xe/xe_vram.c | 32 +-
> > > drivers/pci/Makefile | 2 +-
> > > drivers/pci/iov.c | 9 +-
> > > drivers/pci/pci-sysfs.c | 2 +-
> > > drivers/pci/pci.c | 145 ---------
> > > drivers/pci/pci.h | 5 +-
> > > drivers/pci/rebar.c | 314 ++++++++++++++++++++
> > > drivers/pci/setup-res.c | 78 -----
> > > include/linux/pci.h | 15 +-
> > > 12 files changed, 350 insertions(+), 273 deletions(-)
> > > create mode 100644 drivers/pci/rebar.c
> >
> > Applied to pci/rebar for v6.18, thanks, Ilpo!
>
> is this for v6.18 or it's a typo and it's going to v6.19?
Oops, sorry, I meant v6.19! I still have v6.18 regressions top of
mind :)
> > If we have follow-on resource assignment changes that depend on these,
> > maybe I'll rename the branch to be more generic before applying them.
> >
> > Also applied the drivers/gpu changes based on the acks. I see the CI
> > merge failures since this series is based on v6.18-rc1; I assume the
> > CI applies to current linux-next or similar. I'll check the conflicts
>
> it tries on drm-tip that contains drm-xe-next going to v6.19. We have
> some changes there that conflict, but shouldn't be hard.
>
> We also need https://lore.kernel.org/linux-pci/20250918-xe-pci-rebar-2-v1-1-6c094702a074@intel.com/
> to actually fix the rebar in some cases. Could you take a look?
Will do. Remind me again if I forget!
Bjorn
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v3 00/11] PCI: Resizable BAR improvements
2025-10-23 22:13 ` Bjorn Helgaas
@ 2025-10-24 10:39 ` Ilpo Järvinen
0 siblings, 0 replies; 17+ messages in thread
From: Ilpo Järvinen @ 2025-10-24 10:39 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Lucas De Marchi, linux-pci, Bjorn Helgaas,
Krzysztof Wilczyński, Christian König,
Michał Winiarski, Alex Deucher, amd-gfx, David Airlie,
dri-devel, intel-gfx, intel-xe, Jani Nikula, Joonas Lahtinen,
Rodrigo Vivi, Simona Vetter, Tvrtko Ursulin, Michael J . Ruhl,
Andi Shyti, LKML
[-- Attachment #1: Type: text/plain, Size: 6016 bytes --]
On Thu, 23 Oct 2025, Bjorn Helgaas wrote:
> On Thu, Oct 23, 2025 at 05:02:42PM -0500, Lucas De Marchi wrote:
> > On Thu, Oct 23, 2025 at 04:29:43PM -0500, Bjorn Helgaas wrote:
> > > On Wed, Oct 22, 2025 at 04:33:20PM +0300, Ilpo Järvinen wrote:
> > > > pci.c has been used as catch everything that doesn't fits elsewhere
> > > > within PCI core and thus resizable BAR code has been placed there as
> > > > well. Move Resizable BAR related code to a newly introduced rebar.c to
> > > > reduce size of pci.c. After move, there are no pci_rebar_*() calls from
> > > > pci.c indicating this is indeed well-defined subset of PCI core.
> > > >
> > > > Endpoint drivers perform Resizable BAR related operations which could
> > > > well be performed by PCI core to simplify driver-side code. This
> > > > series adds a few new API functions to that effect and converts the
> > > > drivers to use the new APIs (in separate patches).
> > > >
> > > > While at it, also convert BAR sizes bitmask to u64 as PCIe spec already
> > > > specifies more sizes than what will fit u32 to make the API typing more
> > > > future-proof. The extra sizes beyond 128TB are not added at this point.
> > > >
> > > > Some parts of this are to be used by the resizable BAR changes into the
> > > > resource fitting/assingment logic but these seem to stand on their own
> > > > so sending these out now to reduce the size of the other patch series.
> > > >
> > > > v3:
> > > > - Rebased to solve minor conflicts
> > > >
> > > > v2: https://lore.kernel.org/linux-pci/20250915091358.9203-1-ilpo.jarvinen@linux.intel.com/
> > > > - Kerneldoc:
> > > > - Improve formatting of errno returns
> > > > - Open "ctrl" -> "control"
> > > > - Removed mislead "bit" words (when referring to BAR size)
> > > > - Rewrote pci_rebar_get_possible_sizes() kernel doc to not claim the
> > > > returned bitmask is defined in PCIe spec as the capability bits now
> > > > span across two registers in the spec and are not continuous (we
> > > > don't support the second block of bits yet, but this API is expected
> > > > to return the bits without the hole so it will not be matching with
> > > > the spec layout).
> > > > - Dropped superfluous zero check from pci_rebar_size_supported()
> > > > - Small improvement to changelog of patch 7
> > > >
> > > > Ilpo Järvinen (11):
> > > > PCI: Move Resizable BAR code into rebar.c
> > > > PCI: Cleanup pci_rebar_bytes_to_size() and move into rebar.c
> > > > PCI: Move pci_rebar_size_to_bytes() and export it
> > > > PCI: Improve Resizable BAR functions kernel doc
> > > > PCI: Add pci_rebar_size_supported() helper
> > > > drm/i915/gt: Use pci_rebar_size_supported()
> > > > drm/xe/vram: Use PCI rebar helpers in resize_vram_bar()
> > > > PCI: Add pci_rebar_get_max_size()
> > > > drm/xe/vram: Use pci_rebar_get_max_size()
> > > > drm/amdgpu: Use pci_rebar_get_max_size()
> > > > PCI: Convert BAR sizes bitmasks to u64
> > > >
> > > > Documentation/driver-api/pci/pci.rst | 3 +
> > > > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +-
> > > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 10 +-
> > > > drivers/gpu/drm/xe/xe_vram.c | 32 +-
> > > > drivers/pci/Makefile | 2 +-
> > > > drivers/pci/iov.c | 9 +-
> > > > drivers/pci/pci-sysfs.c | 2 +-
> > > > drivers/pci/pci.c | 145 ---------
> > > > drivers/pci/pci.h | 5 +-
> > > > drivers/pci/rebar.c | 314 ++++++++++++++++++++
> > > > drivers/pci/setup-res.c | 78 -----
> > > > include/linux/pci.h | 15 +-
> > > > 12 files changed, 350 insertions(+), 273 deletions(-)
> > > > create mode 100644 drivers/pci/rebar.c
> > >
> > > Applied to pci/rebar for v6.18, thanks, Ilpo!
> >
> > is this for v6.18 or it's a typo and it's going to v6.19?
>
> Oops, sorry, I meant v6.19! I still have v6.18 regressions top of
> mind :)
>
> > > If we have follow-on resource assignment changes that depend on these,
> > > maybe I'll rename the branch to be more generic before applying them.
Okay.
The bigger challenge, though, will be that it now seems I need to bite the
bullet and rework the BAR resizing functions to fix v6.18-rc & v6.15
regressions which will touch pci_resize_resource() or more to be more
precise, add pci_release_and_resize_resource() interface. I've been
postponing this as it seems quite intrusive and the upcoming resource
fitting improvements should make driver initiated BAR resize pretty
unnecessary anyway. It seems the shortcut didn't work. :-(
It will certainly conflict with the rebar.c move in this series. (I
hopefully have the rework ready next week).
And sure, I've resource assignment changes piling up as well here, just
have been busy with handling all the regression so I've not gotten to
submit some of those. Most of them shouldn't conflict with rebar.c code
anyway (probably only adding a few new helpers for the max rebar changes
will but with the current state of affairs with all these regressions on
my plate, the max rebar changes themselves seems already tracking
next-next instead of 6.19).
> > > Also applied the drivers/gpu changes based on the acks. I see the CI
> > > merge failures since this series is based on v6.18-rc1; I assume the
> > > CI applies to current linux-next or similar. I'll check the conflicts
> >
> > it tries on drm-tip that contains drm-xe-next going to v6.19. We have
> > some changes there that conflict, but shouldn't be hard.
>
> > We also need https://lore.kernel.org/linux-pci/20250918-xe-pci-rebar-2-v1-1-6c094702a074@intel.com/
> > to actually fix the rebar in some cases. Could you take a look?
>
> Will do. Remind me again if I forget!
>
> Bjorn
>
--
i.
^ permalink raw reply [flat|nested] 17+ messages in thread