From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02EAAC433EF for ; Wed, 29 Sep 2021 13:00:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B812961211 for ; Wed, 29 Sep 2021 13:00:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B812961211 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C8BC6EA5D; Wed, 29 Sep 2021 13:00:11 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 17C056E1B4; Wed, 29 Sep 2021 13:00:09 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10121"; a="285949035" X-IronPort-AV: E=Sophos;i="5.85,332,1624345200"; d="scan'208";a="285949035" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 06:00:08 -0700 X-IronPort-AV: E=Sophos;i="5.85,332,1624345200"; d="scan'208";a="538804306" Received: from jmaugusx-mobl1.gar.corp.intel.com (HELO [10.249.254.159]) ([10.249.254.159]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 06:00:07 -0700 Message-ID: <47008b56656bcc908e010570962836c7defa2250.camel@linux.intel.com> From: Thomas =?ISO-8859-1?Q?Hellstr=F6m?= To: Matthew Auld , intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Date: Wed, 29 Sep 2021 15:00:04 +0200 In-Reply-To: <20210927114114.152310-10-matthew.auld@intel.com> References: <20210927114114.152310-1-matthew.auld@intel.com> <20210927114114.152310-10-matthew.auld@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [Intel-gfx] [PATCH v5 10/13] drm/i915: try to simplify make_{un}shrinkable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 2021-09-27 at 12:41 +0100, Matthew Auld wrote: > Drop the atomic shrink_pin stuff, and just have make_{un}shrinkable > update the shrinker visible lists immediately. This at least > simplifies > the next patch, and does make the behaviour more obvious. The > potential > downside is that make_unshrinkable now grabs a global lock even when > the > object itself is no longer shrinkable(transitioning from purgeable <- > > > shrinkable doesn't seem to be a thing), for example in the ppGTT > insertion paths we should now be careful not to needlessly call > make_unshrinkable multiple times. Outside of that there is some > fallout > in intel_context which relies on nesting calls to shrink_pin. > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström Hmm. One thing that worries me a bit here: Let's say we have, for example an LMEM context state, and TTM has it made unshrinkable. Then the context becomes active and calls _make_unshrinkable again. And when it retires it callse _make_shrinkable. Doesn't it end up on the shrinker list at that point, even if still in LMEM? /Thomas