From: Tomi Sarvela <tomi.p.sarvela@intel.com>
To: Marius Vlad <marius.c.vlad@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [CI-ping 1/9] drm/i915: Include engine->last_submitted_seqno in GPU error state
Date: Fri, 08 Apr 2016 09:56:56 +0300 [thread overview]
Message-ID: <47132598.usKypKTSFd@fractal> (raw)
In-Reply-To: <20160407161130.GA24284@mcvlad-wk.rb.intel.com>
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Yesterday CI got lagged for a bit while I was tuning timeouts in host connectivity. We're
now using nmap (instead of ping) to get better results over firewalls and long
distances. Change sparked from connecting French DUT to our Jenkins.
The results for this series were run, but not posted for some reason, so I redid that.
Lots of noise from BSW-NUC, first failed tests were in order:
dmesg-fail: igt/gem_cpu_reloc/basic
dmesg-fail: igt/kms_flip/basic-flip-vs-dpms
dmesg-fail: igt/gem_render_tiled_blits/basic
https://patchwork.freedesktop.org/series/5400/[1]
Tomi
On Thursday 07 April 2016 19:11:30 Marius Vlad wrote:
> There are some results on PW: https://patchwork.freedesktop.org/series/5400/
>
> Fi CI seems to be a little bit late on the results....
>
> On Thu, Apr 07, 2016 at 04:06:49PM +0100, Chris Wilson wrote:
> > On Thu, Apr 07, 2016 at 07:29:10AM +0100, Chris Wilson wrote:
> > > It's useful to look at the last seqno submitted on a particular engine
> > > and compare it against the HWS value to check for irregularities.
> >
> > CI, what have I done to offend you?
> > -Chris
--------
[1] https://patchwork.freedesktop.org/series/5400/
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next prev parent reply other threads:[~2016-04-08 6:56 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-07 6:29 [CI-ping 1/9] drm/i915: Include engine->last_submitted_seqno in GPU error state Chris Wilson
2016-04-07 6:29 ` [CI-ping 2/9] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-07 6:29 ` [CI-ping 3/9] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-07 6:29 ` [CI-ping 4/9] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-07 6:29 ` [CI-ping 5/9] drm/i915: Refactor gen8 semaphore offset calculation Chris Wilson
2016-04-07 6:29 ` [CI-ping 6/9] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-07 6:29 ` [CI-ping 7/9] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-07 6:29 ` [CI-ping 8/9] drm/i915: Apply a mb between emitting the request and hangcheck Chris Wilson
2016-04-07 6:29 ` [CI-ping 9/9] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-07 15:06 ` [CI-ping 1/9] drm/i915: Include engine->last_submitted_seqno in GPU error state Chris Wilson
2016-04-07 16:11 ` Marius Vlad
2016-04-08 6:56 ` Tomi Sarvela [this message]
2016-04-08 6:49 ` ✗ Fi.CI.BAT: failure for series starting with [CI-ping,1/9] " Patchwork
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