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From: Fu Michael <michael_fu@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 0/4 rev2] Sandybridge suspend/resume fixes
Date: Wed, 23 Mar 2011 14:22:39 +0800	[thread overview]
Message-ID: <4D8991AF.4050509@linux.intel.com> (raw)
In-Reply-To: <1300846869-28245-1-git-send-email-zhenyuw@linux.intel.com>

On 2011/3/23 10:21, Zhenyu Wang wrote:
> I've done more testing with below patches, eliminated some in first
> patch set that doesn't affect suspend issue it seems.
>
> The test was done with one rev9 SNB on two boards DH67GD and DQ67SW
> with latest bios. And it both passed over 100 cycles of S3 testing.
> Without these, upstream kernel still hang quickly on them.
>

better to raise the bar to 1000...

> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>

      parent reply	other threads:[~2011-03-23  6:22 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-23  2:21 [PATCH 0/4 rev2] Sandybridge suspend/resume fixes Zhenyu Wang
2011-03-23  2:21 ` [PATCH 1/4] drm/i915: clock gating fix for gen5 and gen6 Zhenyu Wang
2011-03-23  2:21 ` [PATCH 2/4] drm/i915: save/restore DSPARB only for chips before gen4 but not for G33 Zhenyu Wang
2011-03-23  3:03   ` Keith Packard
2011-03-23  4:20     ` Zhenyu Wang
2011-03-23  2:21 ` [PATCH 3/4] drm/i915: save/restore MI_ARB_STATE only before gen6 Zhenyu Wang
2011-03-23  2:21 ` [PATCH 4/4] drm/i915: move sandybridge RC6 enable in resume after ring initialization Zhenyu Wang
2011-03-23  6:22 ` Fu Michael [this message]

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