From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adam Jackson Subject: Re: [PATCH] drm/modes: do not enforce an odd vtotal for interlaced modes Date: Mon, 06 Feb 2012 13:22:25 -0500 Message-ID: <4F301A61.7030905@redhat.com> References: <1327700451-13013-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Dave Airlie Cc: Daniel Vetter , Intel Graphics Development , DRI Development List-Id: intel-gfx@lists.freedesktop.org On 2/3/12 4:37 AM, Dave Airlie wrote: > On Fri, Jan 27, 2012 at 9:40 PM, Daniel Vetter wrote: >> CEA actually specifies an interlaced mode with even vtotal and >> supplies a diagram showing how this is supposed to work. >> >> Note that interlaced modes with an even vtotal seem to be a fairly >> recent invention. All modelines lore I could dig up with googling says >> that vtotal for interlaced modes _needs_ to be odd. But the even >> modelines in CEA are not a spec-bug, there's a figure in CEA-861-E >> called "Figure 5 Special Interlaced Video Format Timing (Even Vtotal)" >> that explains how it's supposed to work. Furthermore intel Bspec >> explicitly mentions that both odd and even interlaced vtotal are >> supported (VTOTAL register in the south display engine of PCH split >> chips). >> >> Cc: Adam Jackson >> Signed-Off-by: Daniel Vetter >> --- > > Ajax? I'd like your ack/review on this. That |= 1 logic was just slavishy copied from the server's RANDR code, which afaict slavishly copied it from xfree86 4, and I think even that was copypasta from xfree86 3. I don't know what it was ever meant to do. - ajax