[PATCH v2 00/13] drm/i915: dissolve soc/

[PATCH v2 00/13] drm/i915: dissolve soc/

[Jani Nikula]

Split soc/ to i915 and display specific parts, and relocate code
accordingly.

In v2, cover all of soc/.

BR,
Jani.

Jani Nikula (13):
  drm/i915/edram: extract i915_edram.[ch] for edram detection
  drm/i915: split out i915_freq.[ch]
  drm/i915: move intel_dram.[ch] from soc/ to display/
  drm/xe: remove MISSING_CASE() from compat i915_utils.h
  drm/i915/dram: convert to struct intel_display
  drm/i915: move dram_info to struct intel_display
  drm/i915: move intel_rom.[ch] from soc/ to display/
  drm/xe: remove remaining platform checks from compat i915_drv.h
  drm/i915/gmch: split out i915_gmch.[ch] from soc
  drm/i915/gmch: switch to use pci_bus_{read,write}_config_word()
  drm/i915/gmch: convert intel_gmch.c to struct intel_display
  drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
  drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915

 drivers/gpu/drm/i915/Makefile                 |  11 +-
 drivers/gpu/drm/i915/display/i9xx_wm.c        |   5 +-
 drivers/gpu/drm/i915/display/intel_bios.c     |   3 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |   5 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |   7 +-
 .../gpu/drm/i915/display/intel_display_core.h |   4 +
 .../drm/i915/display/intel_display_power.c    |   5 +-
 .../drm/i915/{soc => display}/intel_dram.c    | 249 ++++++++----------
 .../drm/i915/{soc => display}/intel_dram.h    |  12 +-
 .../gpu/drm/i915/{soc => display}/intel_rom.c |   0
 .../gpu/drm/i915/{soc => display}/intel_rom.h |   0
 drivers/gpu/drm/i915/display/intel_vga.c      |  44 +++-
 drivers/gpu/drm/i915/display/skl_watermark.c  |   6 +-
 .../gpu/drm/i915/gt/intel_gt_clock_utils.c    |   4 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |   6 +-
 drivers/gpu/drm/i915/i915_driver.c            |  18 +-
 drivers/gpu/drm/i915/i915_drv.h               |   3 -
 drivers/gpu/drm/i915/i915_edram.c             |  44 ++++
 drivers/gpu/drm/i915/i915_edram.h             |  11 +
 drivers/gpu/drm/i915/i915_freq.c              | 111 ++++++++
 drivers/gpu/drm/i915/i915_freq.h              |  13 +
 .../i915/{soc/intel_gmch.c => i915_gmch.c}    |  61 +----
 drivers/gpu/drm/i915/i915_gmch.h              |  13 +
 drivers/gpu/drm/i915/soc/intel_gmch.h         |  20 --
 drivers/gpu/drm/xe/Makefile                   |  13 +-
 .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  15 --
 .../drm/xe/compat-i915-headers/i915_utils.h   |   6 -
 .../xe/compat-i915-headers/soc/intel_dram.h   |   6 -
 .../xe/compat-i915-headers/soc/intel_gmch.h   |   6 -
 .../xe/compat-i915-headers/soc/intel_rom.h    |   6 -
 drivers/gpu/drm/xe/display/xe_display.c       |   4 +-
 drivers/gpu/drm/xe/display/xe_display_misc.c  |  16 --
 drivers/gpu/drm/xe/xe_device_types.h          |   8 -
 33 files changed, 394 insertions(+), 341 deletions(-)
 rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (70%)
 rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (68%)
 rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
 rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
 create mode 100644 drivers/gpu/drm/i915/i915_edram.c
 create mode 100644 drivers/gpu/drm/i915/i915_edram.h
 create mode 100644 drivers/gpu/drm/i915/i915_freq.c
 create mode 100644 drivers/gpu/drm/i915/i915_freq.h
 rename drivers/gpu/drm/i915/{soc/intel_gmch.c => i915_gmch.c} (68%)
 create mode 100644 drivers/gpu/drm/i915/i915_gmch.h
 delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
 delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c

-- 
2.47.3

[PATCH v2 01/13] drm/i915/edram: extract i915_edram.[ch] for edram detection

[Jani Nikula]

While edram detection ostensibly belongs with the rest of the dram stuff
in soc/intel_dram.c, it's only required by i915 core, not
display. Extract it to a separate i915_edram.[ch] file.

This allows us to drop the edram_size_mb member from struct xe_device.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile         |  1 +
 drivers/gpu/drm/i915/i915_driver.c    |  3 +-
 drivers/gpu/drm/i915/i915_edram.c     | 44 +++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_edram.h     | 11 +++++++
 drivers/gpu/drm/i915/soc/intel_dram.c | 36 ----------------------
 drivers/gpu/drm/i915/soc/intel_dram.h |  1 -
 drivers/gpu/drm/xe/xe_device_types.h  |  6 ----
 7 files changed, 58 insertions(+), 44 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_edram.c
 create mode 100644 drivers/gpu/drm/i915/i915_edram.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9a4f89c9a1cd..3ca4e0cace76 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -27,6 +27,7 @@ i915-y += \
 	i915_config.o \
 	i915_driver.o \
 	i915_drm_client.o \
+	i915_edram.o \
 	i915_getparam.o \
 	i915_ioctl.o \
 	i915_irq.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 7c60b6873934..44a17ffc3058 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -94,6 +94,7 @@
 #include "i915_driver.h"
 #include "i915_drm_client.h"
 #include "i915_drv.h"
+#include "i915_edram.h"
 #include "i915_file_private.h"
 #include "i915_getparam.h"
 #include "i915_hwmon.h"
@@ -493,7 +494,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 	}
 
 	/* needs to be done before ggtt probe */
-	intel_dram_edram_detect(dev_priv);
+	i915_edram_detect(dev_priv);
 
 	ret = i915_set_dma_info(dev_priv);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/i915_edram.c b/drivers/gpu/drm/i915/i915_edram.c
new file mode 100644
index 000000000000..5818ec396d1e
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_edram.h"
+#include "i915_reg.h"
+
+static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
+{
+	static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
+	static const u8 sets[4] = { 1, 1, 2, 2 };
+
+	return EDRAM_NUM_BANKS(cap) *
+		ways[EDRAM_WAYS_IDX(cap)] *
+		sets[EDRAM_SETS_IDX(cap)];
+}
+
+void i915_edram_detect(struct drm_i915_private *i915)
+{
+	u32 edram_cap = 0;
+
+	if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
+		return;
+
+	edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
+
+	/* NB: We can't write IDICR yet because we don't have gt funcs set up */
+
+	if (!(edram_cap & EDRAM_ENABLED))
+		return;
+
+	/*
+	 * The needed capability bits for size calculation are not there with
+	 * pre gen9 so return 128MB always.
+	 */
+	if (GRAPHICS_VER(i915) < 9)
+		i915->edram_size_mb = 128;
+	else
+		i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
+
+	drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
+}
diff --git a/drivers/gpu/drm/i915/i915_edram.h b/drivers/gpu/drm/i915/i915_edram.h
new file mode 100644
index 000000000000..8319422ace9d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_DRAM_H__
+#define __I915_DRAM_H__
+
+struct drm_i915_private;
+
+void i915_edram_detect(struct drm_i915_private *i915);
+
+#endif /* __I915_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 739cfe48f6db..cfe96c3c1b1a 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -861,39 +861,3 @@ const struct dram_info *intel_dram_info(struct drm_device *drm)
 
 	return i915->dram_info;
 }
-
-static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
-{
-	static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
-	static const u8 sets[4] = { 1, 1, 2, 2 };
-
-	return EDRAM_NUM_BANKS(cap) *
-		ways[EDRAM_WAYS_IDX(cap)] *
-		sets[EDRAM_SETS_IDX(cap)];
-}
-
-void intel_dram_edram_detect(struct drm_i915_private *i915)
-{
-	u32 edram_cap = 0;
-
-	if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
-		return;
-
-	edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
-
-	/* NB: We can't write IDICR yet because we don't have gt funcs set up */
-
-	if (!(edram_cap & EDRAM_ENABLED))
-		return;
-
-	/*
-	 * The needed capability bits for size calculation are not there with
-	 * pre gen9 so return 128MB always.
-	 */
-	if (GRAPHICS_VER(i915) < 9)
-		i915->edram_size_mb = 128;
-	else
-		i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
-
-	drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
-}
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/soc/intel_dram.h
index 8475ee379daa..58aaf2f91afe 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.h
+++ b/drivers/gpu/drm/i915/soc/intel_dram.h
@@ -35,7 +35,6 @@ struct dram_info {
 	bool has_16gb_dimms;
 };
 
-void intel_dram_edram_detect(struct drm_i915_private *i915);
 int intel_dram_detect(struct drm_i915_private *i915);
 unsigned int intel_fsb_freq(struct drm_i915_private *i915);
 unsigned int intel_mem_freq(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 0b2fa7c56d38..a072c020b84b 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -650,12 +650,6 @@ struct xe_device {
 	 */
 	const struct dram_info *dram_info;
 
-	/*
-	 * edram size in MB.
-	 * Cannot be determined by PCIID. You must always read a register.
-	 */
-	u32 edram_size_mb;
-
 	struct intel_uncore {
 		spinlock_t lock;
 	} uncore;
-- 
2.47.3

[PATCH v2 02/13] drm/i915: split out i915_freq.[ch]

[Jani Nikula]

The i915 core only needs three rather specific functions from
soc/intel_dram.[ch]: i9xx_fsb_freq(), ilk_fsb_freq(), and
ilk_mem_freq(). Add new i915_freq.[ch] and duplicate those functions for
i915 to reduce the dependency on soc/ code.

Wile duplication in general is bad, here it's a tradeoff to simplify the
i915, xe and display interactions.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/gt/intel_gt_clock_utils.c    |   4 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |   6 +-
 drivers/gpu/drm/i915/i915_freq.c              | 111 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_freq.h              |  13 ++
 5 files changed, 130 insertions(+), 5 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_freq.c
 create mode 100644 drivers/gpu/drm/i915/i915_freq.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3ca4e0cace76..a696d8b77b4d 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -28,6 +28,7 @@ i915-y += \
 	i915_driver.o \
 	i915_drm_client.o \
 	i915_edram.o \
+	i915_freq.o \
 	i915_getparam.o \
 	i915_ioctl.o \
 	i915_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
index c90b35881a26..aecd120972ea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
@@ -4,12 +4,12 @@
  */
 
 #include "i915_drv.h"
+#include "i915_freq.h"
 #include "i915_reg.h"
 #include "intel_gt.h"
 #include "intel_gt_clock_utils.h"
 #include "intel_gt_print.h"
 #include "intel_gt_regs.h"
-#include "soc/intel_dram.h"
 
 static u32 read_reference_ts_freq(struct intel_uncore *uncore)
 {
@@ -148,7 +148,7 @@ static u32 gen4_read_clock_frequency(struct intel_uncore *uncore)
 	 *
 	 * Testing on actual hardware has shown there is no /16.
 	 */
-	return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
+	return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000;
 }
 
 static u32 read_clock_frequency(struct intel_uncore *uncore)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index d233dc122bd7..90b7eee78f1f 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -10,9 +10,9 @@
 
 #include "display/intel_display_rps.h"
 #include "display/vlv_clock.h"
-#include "soc/intel_dram.h"
 
 #include "i915_drv.h"
+#include "i915_freq.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
 #include "i915_wait_util.h"
@@ -285,8 +285,8 @@ static void gen5_rps_init(struct intel_rps *rps)
 	u32 rgvmodectl;
 	int c_m, i;
 
-	fsb_freq = intel_fsb_freq(i915);
-	mem_freq = intel_mem_freq(i915);
+	fsb_freq = ilk_fsb_freq(i915);
+	mem_freq = ilk_mem_freq(i915);
 
 	if (fsb_freq <= 3200000)
 		c_m = 0;
diff --git a/drivers/gpu/drm/i915/i915_freq.c b/drivers/gpu/drm/i915/i915_freq.c
new file mode 100644
index 000000000000..9bdaea34aef9
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_freq.h"
+#include "intel_mchbar_regs.h"
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+{
+	u32 fsb;
+
+	/*
+	 * Note that this only reads the state of the FSB
+	 * straps, not the actual FSB frequency. Some BIOSen
+	 * let you configure each independently. Ideally we'd
+	 * read out the actual FSB frequency but sadly we
+	 * don't know which registers have that information,
+	 * and all the relevant docs have gone to bit heaven :(
+	 */
+	fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
+
+	if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+		switch (fsb) {
+		case CLKCFG_FSB_400:
+			return 400000;
+		case CLKCFG_FSB_533:
+			return 533333;
+		case CLKCFG_FSB_667:
+			return 666667;
+		case CLKCFG_FSB_800:
+			return 800000;
+		case CLKCFG_FSB_1067:
+			return 1066667;
+		case CLKCFG_FSB_1333:
+			return 1333333;
+		default:
+			MISSING_CASE(fsb);
+			return 1333333;
+		}
+	} else {
+		switch (fsb) {
+		case CLKCFG_FSB_400_ALT:
+			return 400000;
+		case CLKCFG_FSB_533:
+			return 533333;
+		case CLKCFG_FSB_667:
+			return 666667;
+		case CLKCFG_FSB_800:
+			return 800000;
+		case CLKCFG_FSB_1067_ALT:
+			return 1066667;
+		case CLKCFG_FSB_1333_ALT:
+			return 1333333;
+		case CLKCFG_FSB_1600_ALT:
+			return 1600000;
+		default:
+			MISSING_CASE(fsb);
+			return 1333333;
+		}
+	}
+}
+
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915)
+{
+	u16 fsb;
+
+	fsb = intel_uncore_read16(&i915->uncore, CSIPLL0) & 0x3ff;
+
+	switch (fsb) {
+	case 0x00c:
+		return 3200000;
+	case 0x00e:
+		return 3733333;
+	case 0x010:
+		return 4266667;
+	case 0x012:
+		return 4800000;
+	case 0x014:
+		return 5333333;
+	case 0x016:
+		return 5866667;
+	case 0x018:
+		return 6400000;
+	default:
+		drm_dbg(&i915->drm, "unknown fsb frequency 0x%04x\n", fsb);
+		return 0;
+	}
+}
+
+unsigned int ilk_mem_freq(struct drm_i915_private *i915)
+{
+	u16 ddrpll;
+
+	ddrpll = intel_uncore_read16(&i915->uncore, DDRMPLL1);
+	switch (ddrpll & 0xff) {
+	case 0xc:
+		return 800000;
+	case 0x10:
+		return 1066667;
+	case 0x14:
+		return 1333333;
+	case 0x18:
+		return 1600000;
+	default:
+		drm_dbg(&i915->drm, "unknown memory frequency 0x%02x\n",
+			ddrpll & 0xff);
+		return 0;
+	}
+}
diff --git a/drivers/gpu/drm/i915/i915_freq.h b/drivers/gpu/drm/i915/i915_freq.h
new file mode 100644
index 000000000000..53b0ecb95440
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_FREQ_H__
+#define __I915_FREQ_H__
+
+struct drm_i915_private;
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_mem_freq(struct drm_i915_private *i915);
+
+#endif /* __I915_FREQ_H__ */
-- 
2.47.3

[PATCH v2 03/13] drm/i915: move intel_dram.[ch] from soc/ to display/

[Jani Nikula]

The remaining users of intel_dram.[ch] are all in display. Move them
under display.

This allows us to remove the compat soc/intel_dram.h from xe.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                           | 2 +-
 drivers/gpu/drm/i915/display/i9xx_wm.c                  | 3 +--
 drivers/gpu/drm/i915/display/intel_bw.c                 | 3 +--
 drivers/gpu/drm/i915/display/intel_cdclk.c              | 3 +--
 drivers/gpu/drm/i915/display/intel_display_power.c      | 3 +--
 drivers/gpu/drm/i915/{soc => display}/intel_dram.c      | 5 ++---
 drivers/gpu/drm/i915/{soc => display}/intel_dram.h      | 0
 drivers/gpu/drm/i915/display/skl_watermark.c            | 2 +-
 drivers/gpu/drm/i915/i915_driver.c                      | 2 +-
 drivers/gpu/drm/xe/Makefile                             | 2 +-
 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h | 6 ------
 drivers/gpu/drm/xe/display/xe_display.c                 | 2 +-
 12 files changed, 11 insertions(+), 22 deletions(-)
 rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (99%)
 rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (100%)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index a696d8b77b4d..838c8e58e4a2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,7 +58,6 @@ i915-y += \
 
 # core peripheral code
 i915-y += \
-	soc/intel_dram.o \
 	soc/intel_gmch.o \
 	soc/intel_rom.o
 
@@ -268,6 +267,7 @@ i915-y += \
 	display/intel_dpll_mgr.o \
 	display/intel_dpt.o \
 	display/intel_dpt_common.o \
+	display/intel_dram.o \
 	display/intel_drrs.o \
 	display/intel_dsb.o \
 	display/intel_dsb_buffer.o \
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 01f3803fa09f..27e2d73bc505 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -7,8 +7,6 @@
 
 #include <drm/drm_print.h>
 
-#include "soc/intel_dram.h"
-
 #include "i915_drv.h"
 #include "i915_reg.h"
 #include "i9xx_wm.h"
@@ -19,6 +17,7 @@
 #include "intel_display.h"
 #include "intel_display_regs.h"
 #include "intel_display_trace.h"
+#include "intel_dram.h"
 #include "intel_fb.h"
 #include "intel_mchbar_regs.h"
 #include "intel_wm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 1f6461be50ef..957c90e62569 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -6,8 +6,6 @@
 #include <drm/drm_atomic_state_helper.h>
 #include <drm/drm_print.h>
 
-#include "soc/intel_dram.h"
-
 #include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_bw.h"
@@ -16,6 +14,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_dram.h"
 #include "intel_mchbar_regs.h"
 #include "intel_pcode.h"
 #include "intel_uncore.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 37801c744b05..531819391c8c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -28,8 +28,6 @@
 #include <drm/drm_fixed.h>
 #include <drm/drm_print.h>
 
-#include "soc/intel_dram.h"
-
 #include "hsw_ips.h"
 #include "i915_drv.h"
 #include "i915_reg.h"
@@ -42,6 +40,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_dram.h"
 #include "intel_mchbar_regs.h"
 #include "intel_pci_config.h"
 #include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a383ef23391d..9c5f0277d8c2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -8,8 +8,6 @@
 
 #include <drm/drm_print.h>
 
-#include "soc/intel_dram.h"
-
 #include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_backlight_regs.h"
@@ -25,6 +23,7 @@
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
 #include "intel_dmc.h"
+#include "intel_dram.h"
 #include "intel_mchbar_regs.h"
 #include "intel_parent.h"
 #include "intel_pch_refclk.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
similarity index 99%
rename from drivers/gpu/drm/i915/soc/intel_dram.c
rename to drivers/gpu/drm/i915/display/intel_dram.c
index cfe96c3c1b1a..7142772f2a6e 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -8,11 +8,10 @@
 #include <drm/drm_managed.h>
 #include <drm/drm_print.h>
 
-#include "../display/intel_display_core.h" /* FIXME */
-
 #include "i915_drv.h"
 #include "i915_reg.h"
-#include "i915_utils.h"
+#include "intel_display_core.h"
+#include "intel_display_utils.h"
 #include "intel_dram.h"
 #include "intel_mchbar_regs.h"
 #include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_dram.h
rename to drivers/gpu/drm/i915/display/intel_dram.h
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 54e9e0be019d..a33e0cec8cba 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -8,7 +8,6 @@
 #include <drm/drm_blend.h>
 #include <drm/drm_print.h>
 
-#include "soc/intel_dram.h"
 #include "i915_reg.h"
 #include "i9xx_wm.h"
 #include "intel_atomic.h"
@@ -23,6 +22,7 @@
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_dram.h"
 #include "intel_fb.h"
 #include "intel_fixed.h"
 #include "intel_flipq.h"
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 44a17ffc3058..d1f573f1b6cc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -59,6 +59,7 @@
 #include "display/intel_dmc.h"
 #include "display/intel_dp.h"
 #include "display/intel_dpt.h"
+#include "display/intel_dram.h"
 #include "display/intel_encoder.h"
 #include "display/intel_fbdev.h"
 #include "display/intel_gmbus.h"
@@ -87,7 +88,6 @@
 #include "pxp/intel_pxp_debugfs.h"
 #include "pxp/intel_pxp_pm.h"
 
-#include "soc/intel_dram.h"
 #include "soc/intel_gmch.h"
 
 #include "i915_debugfs.h"
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 1a3aa041820d..85642340a8fa 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -224,7 +224,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 
 # SOC code shared with i915
 xe-$(CONFIG_DRM_XE_DISPLAY) += \
-	i915-soc/intel_dram.o \
 	i915-soc/intel_rom.o
 
 # Display code shared with i915
@@ -276,6 +275,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_dpll.o \
 	i915-display/intel_dpll_mgr.o \
 	i915-display/intel_dpt_common.o \
+	i915-display/intel_dram.o \
 	i915-display/intel_drrs.o \
 	i915-display/intel_dsb.o \
 	i915-display/intel_dsi.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
deleted file mode 100644
index 65707e20c557..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_dram.h"
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index e3320d9e6314..9b1d21e03df0 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -17,7 +17,6 @@
 #include <drm/intel/display_parent_interface.h>
 #include <uapi/drm/xe_drm.h>
 
-#include "soc/intel_dram.h"
 #include "intel_acpi.h"
 #include "intel_audio.h"
 #include "intel_bw.h"
@@ -29,6 +28,7 @@
 #include "intel_dmc.h"
 #include "intel_dmc_wl.h"
 #include "intel_dp.h"
+#include "intel_dram.h"
 #include "intel_encoder.h"
 #include "intel_fbdev.h"
 #include "intel_hdcp.h"
-- 
2.47.3

[PATCH v2 04/13] drm/xe: remove MISSING_CASE() from compat i915_utils.h

[Jani Nikula]

There are no longer users for MISSING_CASE() in the compat
i915_utils.h. Remove it to prevent new users from showing up.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
index bcd441dc0fce..3639721f0bf8 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
@@ -3,11 +3,5 @@
  * Copyright © 2023 Intel Corporation
  */
 
-/* for soc/ */
-#ifndef MISSING_CASE
-#define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
-			     __stringify(x), (long)(x))
-#endif
-
 /* for a couple of users under i915/display */
 #define i915_inject_probe_failure(unused) ((unused) && 0)
-- 
2.47.3

[PATCH v2 05/13] drm/i915/dram: convert to struct intel_display

[Jani Nikula]

Convert everything except uncore access to struct intel_display.

While at it, convert logging to drm_dbg_kms().

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c        |   2 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |   4 +-
 .../drm/i915/display/intel_display_power.c    |   2 +-
 drivers/gpu/drm/i915/display/intel_dram.c     | 205 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dram.h     |  11 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |   4 +-
 drivers/gpu/drm/i915/i915_driver.c            |   2 +-
 drivers/gpu/drm/xe/display/xe_display.c       |   2 +-
 9 files changed, 120 insertions(+), 114 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 27e2d73bc505..167277cd8877 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
 
 static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 	bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
 	int i;
 
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 957c90e62569..d27835ed49c2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
 
 void intel_bw_init_hw(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 
 	if (!HAS_DISPLAY(display))
 		return;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 531819391c8c..5c90e53b4e46 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
 
 static int i9xx_hrawclk(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
 	/* hrawclock is 1/4 the FSB frequency */
-	return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
+	return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 9c5f0277d8c2..08db9bbbfcb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
 
 static void tgl_bw_buddy_init(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 	const struct buddy_page_mask *table;
 	unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
 	int config, i;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 7142772f2a6e..3dfcc7938740 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
 
 #undef DRAM_TYPE_STR
 
-static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
 	return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
 		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
 }
 
-static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int pnv_mem_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 tmp;
 
 	tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
@@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
 	return 0;
 }
 
-static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_mem_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u16 ddrpll;
 
 	ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
@@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
 	case 0x18:
 		return 1600000;
 	default:
-		drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
-			ddrpll & 0xff);
+		drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
+			    ddrpll & 0xff);
 		return 0;
 	}
 }
 
-static unsigned int chv_mem_freq(struct drm_i915_private *i915)
+static unsigned int chv_mem_freq(struct intel_display *display)
 {
 	u32 val;
 
-	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
-	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
-	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
+	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
+	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
+	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
 
 	switch ((val >> 2) & 0x7) {
 	case 3:
@@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
 	}
 }
 
-static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
+static unsigned int vlv_mem_freq(struct intel_display *display)
 {
 	u32 val;
 
-	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
-	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
-	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
+	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
+	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
+	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
 
 	switch ((val >> 6) & 3) {
 	case 0:
@@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
 	return 0;
 }
 
-unsigned int intel_mem_freq(struct drm_i915_private *i915)
+unsigned int intel_mem_freq(struct intel_display *display)
 {
-	if (IS_PINEVIEW(i915))
-		return pnv_mem_freq(i915);
-	else if (GRAPHICS_VER(i915) == 5)
-		return ilk_mem_freq(i915);
-	else if (IS_CHERRYVIEW(i915))
-		return chv_mem_freq(i915);
-	else if (IS_VALLEYVIEW(i915))
-		return vlv_mem_freq(i915);
+	if (display->platform.pineview)
+		return pnv_mem_freq(display);
+	else if (DISPLAY_VER(display) == 5)
+		return ilk_mem_freq(display);
+	else if (display->platform.cherryview)
+		return chv_mem_freq(display);
+	else if (display->platform.valleyview)
+		return vlv_mem_freq(display);
 	else
 		return 0;
 }
 
-static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 fsb;
 
 	/*
@@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
 	 */
 	fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
 
-	if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+	if (display->platform.pineview || display->platform.mobile) {
 		switch (fsb) {
 		case CLKCFG_FSB_400:
 			return 400000;
@@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
 	}
 }
 
-static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_fsb_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u16 fsb;
 
 	fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
@@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
 	case 0x018:
 		return 6400000;
 	default:
-		drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
+		drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
 		return 0;
 	}
 }
 
-unsigned int intel_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct intel_display *display)
 {
-	if (GRAPHICS_VER(i915) == 5)
-		return ilk_fsb_freq(i915);
-	else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
-		return i9xx_fsb_freq(i915);
+	if (DISPLAY_VER(display) == 5)
+		return ilk_fsb_freq(display);
+	else if (IS_DISPLAY_VER(display, 3, 4))
+		return i9xx_fsb_freq(display);
 	else
 		return 0;
 }
 
-static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	dram_info->fsb_freq = intel_fsb_freq(i915);
+	dram_info->fsb_freq = intel_fsb_freq(display);
 	if (dram_info->fsb_freq)
-		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
+		drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
 
-	dram_info->mem_freq = intel_mem_freq(i915);
+	dram_info->mem_freq = intel_mem_freq(display);
 	if (dram_info->mem_freq)
-		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
+		drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
 
-	if (IS_PINEVIEW(i915))
-		dram_info->type = pnv_dram_type(i915);
+	if (display->platform.pineview)
+		dram_info->type = pnv_dram_type(display);
 
 	return 0;
 }
@@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
 }
 
 static void
-skl_dram_print_dimm_info(struct drm_i915_private *i915,
+skl_dram_print_dimm_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, char dimm_name)
 {
-	drm_dbg_kms(&i915->drm,
+	drm_dbg_kms(display->drm,
 		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
 		    str_yes_no(skl_is_16gb_dimm(dimm)));
 }
 
 static void
-skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_l_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, u32 val)
 {
-	if (GRAPHICS_VER(i915) >= 11) {
+	if (DISPLAY_VER(display) >= 11) {
 		dimm->size = icl_get_dimm_l_size(val);
 		dimm->width = icl_get_dimm_l_width(val);
 		dimm->ranks = icl_get_dimm_l_ranks(val);
@@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
 		dimm->ranks = skl_get_dimm_l_ranks(val);
 	}
 
-	skl_dram_print_dimm_info(i915, dimm, channel, 'L');
+	skl_dram_print_dimm_info(display, dimm, channel, 'L');
 }
 
 static void
-skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_s_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, u32 val)
 {
-	if (GRAPHICS_VER(i915) >= 11) {
+	if (DISPLAY_VER(display) >= 11) {
 		dimm->size = icl_get_dimm_s_size(val);
 		dimm->width = icl_get_dimm_s_width(val);
 		dimm->ranks = icl_get_dimm_s_ranks(val);
@@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
 		dimm->ranks = skl_get_dimm_s_ranks(val);
 	}
 
-	skl_dram_print_dimm_info(i915, dimm, channel, 'S');
+	skl_dram_print_dimm_info(display, dimm, channel, 'S');
 }
 
 static int
-skl_dram_get_channel_info(struct drm_i915_private *i915,
+skl_dram_get_channel_info(struct intel_display *display,
 			  struct dram_channel_info *ch,
 			  int channel, u32 val)
 {
-	skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
-	skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
+	skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
+	skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
 
 	if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
-		drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
+		drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
 		return -EINVAL;
 	}
 
@@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
 	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
 		skl_is_16gb_dimm(&ch->dimm_s);
 
-	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
+	drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
 
 	return 0;
@@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
 }
 
 static int
-skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct dram_channel_info ch0 = {}, ch1 = {};
 	u32 val;
 	int ret;
@@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 
 	val = intel_uncore_read(&i915->uncore,
 				SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
-	ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
+	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
 	if (ret == 0)
 		dram_info->num_channels++;
 
 	val = intel_uncore_read(&i915->uncore,
 				SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
-	ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
+	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
 	if (ret == 0)
 		dram_info->num_channels++;
 
 	if (dram_info->num_channels == 0) {
-		drm_info(&i915->drm, "Number of memory channels is zero\n");
+		drm_info(display->drm, "Number of memory channels is zero\n");
 		return -EINVAL;
 	}
 
 	if (ch0.ranks == 0 && ch1.ranks == 0) {
-		drm_info(&i915->drm, "couldn't get memory rank information\n");
+		drm_info(display->drm, "couldn't get memory rank information\n");
 		return -EINVAL;
 	}
 
@@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 
 	dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
 
-	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
+	drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
 		    str_yes_no(dram_info->symmetric_memory));
 
-	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
+	drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
 		    str_yes_no(dram_info->has_16gb_dimms));
 
 	return 0;
 }
 
 static enum intel_dram_type
-skl_get_dram_type(struct drm_i915_private *i915)
+skl_get_dram_type(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val;
 
 	val = intel_uncore_read(&i915->uncore,
@@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
 }
 
 static int
-skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
 	int ret;
 
-	dram_info->type = skl_get_dram_type(i915);
+	dram_info->type = skl_get_dram_type(display);
 
-	ret = skl_dram_get_channels_info(i915, dram_info);
+	ret = skl_dram_get_channels_info(display, dram_info);
 	if (ret)
 		return ret;
 
@@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
 	dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
 }
 
-static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val;
 	u8 valid_ranks = 0;
 	int i;
@@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
 		bxt_get_dimm_info(&dimm, val);
 		type = bxt_get_dimm_type(val);
 
-		drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
+		drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
 			    dram_info->type != INTEL_DRAM_UNKNOWN &&
 			    dram_info->type != type);
 
-		drm_dbg_kms(&i915->drm,
+		drm_dbg_kms(display->drm,
 			    "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
 			    i - BXT_D_CR_DRP0_DUNIT_START,
 			    dimm.size, dimm.width, dimm.ranks);
@@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
 	}
 
 	if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
-		drm_info(&i915->drm, "couldn't get memory information\n");
+		drm_info(display->drm, "couldn't get memory information\n");
 		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
+static int icl_pcode_read_mem_global_info(struct intel_display *display,
 					  struct dram_info *dram_info)
 {
 	u32 val = 0;
 	int ret;
 
-	ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+	ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
 			       ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
 	if (ret)
 		return ret;
 
-	if (GRAPHICS_VER(dev_priv) == 12) {
+	if (DISPLAY_VER(display) == 12) {
 		switch (val & 0xf) {
 		case 0:
 			dram_info->type = INTEL_DRAM_DDR4;
@@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 	return 0;
 }
 
-static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
 	int ret;
 
-	ret = skl_dram_get_channels_info(i915, dram_info);
+	ret = skl_dram_get_channels_info(display, dram_info);
 	if (ret)
 		return ret;
 
-	return icl_pcode_read_mem_global_info(i915, dram_info);
+	return icl_pcode_read_mem_global_info(display, dram_info);
 }
 
-static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	return icl_pcode_read_mem_global_info(i915, dram_info);
+	return icl_pcode_read_mem_global_info(display, dram_info);
 }
 
-static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	struct intel_display *display = i915->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
 
 	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
@@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
 		dram_info->type = INTEL_DRAM_LPDDR3;
 		break;
 	case 8:
-		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+		drm_WARN_ON(display->drm, !display->platform.dgfx);
 		dram_info->type = INTEL_DRAM_GDDR;
 		break;
 	case 9:
-		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+		drm_WARN_ON(display->drm, !display->platform.dgfx);
 		dram_info->type = INTEL_DRAM_GDDR_ECC;
 		break;
 	default:
@@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
 	return 0;
 }
 
-int intel_dram_detect(struct drm_i915_private *i915)
+int intel_dram_detect(struct intel_display *display)
 {
-	struct intel_display *display = i915->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct dram_info *dram_info;
 	int ret;
 
-	if (IS_DG2(i915) || !intel_display_device_present(display))
+	if (display->platform.dg2 || !HAS_DISPLAY(display))
 		return 0;
 
-	dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+	dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
 	if (!dram_info)
 		return -ENOMEM;
 
 	i915->dram_info = dram_info;
 
 	if (DISPLAY_VER(display) >= 14)
-		ret = xelpdp_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 12)
-		ret = gen12_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 11)
-		ret = gen11_get_dram_info(i915, dram_info);
-	else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
-		ret = bxt_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 9)
-		ret = skl_get_dram_info(i915, dram_info);
+		ret = xelpdp_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 12)
+		ret = gen12_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 11)
+		ret = gen11_get_dram_info(display, dram_info);
+	else if (display->platform.broxton || display->platform.geminilake)
+		ret = bxt_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 9)
+		ret = skl_get_dram_info(display, dram_info);
 	else
-		ret = i915_get_dram_info(i915, dram_info);
+		ret = i915_get_dram_info(display, dram_info);
 
-	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
+	drm_dbg_kms(display->drm, "DRAM type: %s\n",
 		    intel_dram_type_str(dram_info->type));
 
-	drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
+	drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
 
-	drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
-	drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
+	drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
+	drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
 
 	/* TODO: Do we want to abort probe on dram detection failures? */
 	if (ret)
@@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
  * checks, and prefer not dereferencing on platforms that shouldn't look at dram
  * info, to catch accidental and incorrect dram info checks.
  */
-const struct dram_info *intel_dram_info(struct drm_device *drm)
+const struct dram_info *intel_dram_info(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(drm);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	return i915->dram_info;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
index 58aaf2f91afe..5800b7b4e614 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.h
+++ b/drivers/gpu/drm/i915/display/intel_dram.h
@@ -8,8 +8,7 @@
 
 #include <linux/types.h>
 
-struct drm_i915_private;
-struct drm_device;
+struct intel_display;
 
 struct dram_info {
 	enum intel_dram_type {
@@ -35,10 +34,10 @@ struct dram_info {
 	bool has_16gb_dimms;
 };
 
-int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int intel_fsb_freq(struct drm_i915_private *i915);
-unsigned int intel_mem_freq(struct drm_i915_private *i915);
-const struct dram_info *intel_dram_info(struct drm_device *drm);
+int intel_dram_detect(struct intel_display *display);
+unsigned int intel_fsb_freq(struct intel_display *display);
+unsigned int intel_mem_freq(struct intel_display *display);
+const struct dram_info *intel_dram_info(struct intel_display *display);
 const char *intel_dram_type_str(enum intel_dram_type type);
 
 #endif /* __INTEL_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a33e0cec8cba..7964cfffdaae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
 	if (display->platform.kabylake ||
 	    display->platform.coffeelake ||
 	    display->platform.cometlake) {
-		const struct dram_info *dram_info = intel_dram_info(display->drm);
+		const struct dram_info *dram_info = intel_dram_info(display);
 
 		return dram_info->symmetric_memory;
 	}
@@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
 
 static bool need_16gb_dimm_wa(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 
 	return (display->platform.skylake || display->platform.kabylake ||
 		display->platform.coffeelake || display->platform.cometlake ||
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index d1f573f1b6cc..2369e2b55096 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 	 * Fill the dram structure to get the system dram info. This will be
 	 * used for memory latency calculation.
 	 */
-	ret = intel_dram_detect(dev_priv);
+	ret = intel_dram_detect(display);
 	if (ret)
 		goto err_opregion;
 
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 9b1d21e03df0..793115077615 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
 	 * Fill the dram structure to get the system dram info. This will be
 	 * used for memory latency calculation.
 	 */
-	err = intel_dram_detect(xe);
+	err = intel_dram_detect(display);
 	if (err)
 		goto err_opregion;
 
-- 
2.47.3

[PATCH v2 06/13] drm/i915: move dram_info to struct intel_display

[Jani Nikula]

With all of dram code under display, also move dram_info to struct
intel_display.

This further cleans up struct xe_device from display related members.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
 drivers/gpu/drm/i915/display/intel_dram.c         | 7 ++-----
 drivers/gpu/drm/i915/i915_drv.h                   | 3 ---
 drivers/gpu/drm/xe/xe_device_types.h              | 2 --
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9b8414b77c15..9b36654b593d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -394,6 +394,10 @@ struct intel_display {
 		u32 mmio_base;
 	} dsi;
 
+	struct {
+		const struct dram_info *info;
+	} dram;
+
 	struct {
 		/* list of fbdev register on this device */
 		struct intel_fbdev *fbdev;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 3dfcc7938740..b078fd9fe3c0 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -817,7 +817,6 @@ static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info
 
 int intel_dram_detect(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct dram_info *dram_info;
 	int ret;
 
@@ -828,7 +827,7 @@ int intel_dram_detect(struct intel_display *display)
 	if (!dram_info)
 		return -ENOMEM;
 
-	i915->dram_info = dram_info;
+	display->dram.info = dram_info;
 
 	if (DISPLAY_VER(display) >= 14)
 		ret = xelpdp_get_dram_info(display, dram_info);
@@ -865,7 +864,5 @@ int intel_dram_detect(struct intel_display *display)
  */
 const struct dram_info *intel_dram_info(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	return i915->dram_info;
+	return display->dram.info;
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5381a934a671..96af7776bee5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -60,7 +60,6 @@
 #include "intel_step.h"
 #include "intel_uncore.h"
 
-struct dram_info;
 struct drm_i915_clock_gating_funcs;
 struct intel_display;
 struct intel_pxp;
@@ -279,8 +278,6 @@ struct drm_i915_private {
 	u32 suspend_count;
 	struct vlv_s0ix_state *vlv_s0ix_state;
 
-	const struct dram_info *dram_info;
-
 	struct intel_runtime_pm runtime_pm;
 
 	struct i915_perf perf;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a072c020b84b..6ce3247d1bd8 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -35,7 +35,6 @@
 #define TEST_VM_OPS_ERROR
 #endif
 
-struct dram_info;
 struct intel_display;
 struct intel_dg_nvm_dev;
 struct xe_ggtt;
@@ -648,7 +647,6 @@ struct xe_device {
 	 * drm_i915_private during build. After cleanup these should go away,
 	 * migrating to the right sub-structs
 	 */
-	const struct dram_info *dram_info;
 
 	struct intel_uncore {
 		spinlock_t lock;
-- 
2.47.3

[PATCH v2 07/13] drm/i915: move intel_rom.[ch] from soc/ to display/

[Jani Nikula]

The sole user of intel_rom.[ch] has always been in display. Move them
under display.

This allows us to remove the compat soc/intel_rom.h from xe, as well as
the Makefile rules to build anything from soc/.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                          |  4 ++--
 drivers/gpu/drm/i915/display/intel_bios.c              |  3 +--
 drivers/gpu/drm/i915/{soc => display}/intel_rom.c      |  0
 drivers/gpu/drm/i915/{soc => display}/intel_rom.h      |  0
 drivers/gpu/drm/xe/Makefile                            | 10 +---------
 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h |  6 ------
 6 files changed, 4 insertions(+), 19 deletions(-)
 rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
 rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 838c8e58e4a2..12f948f0062c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,8 +58,7 @@ i915-y += \
 
 # core peripheral code
 i915-y += \
-	soc/intel_gmch.o \
-	soc/intel_rom.o
+	soc/intel_gmch.o
 
 # core library code
 i915-y += \
@@ -303,6 +302,7 @@ i915-y += \
 	display/intel_pmdemand.o \
 	display/intel_psr.o \
 	display/intel_quirks.o \
+	display/intel_rom.o \
 	display/intel_sbi.o \
 	display/intel_sprite.o \
 	display/intel_sprite_uapi.o \
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4b41068e9e35..a639c5eb3245 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,14 +34,13 @@
 #include <drm/drm_fixed.h>
 #include <drm/drm_print.h>
 
-#include "soc/intel_rom.h"
-
 #include "intel_display.h"
 #include "intel_display_core.h"
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
 #include "intel_gmbus.h"
+#include "intel_rom.h"
 
 #define _INTEL_BIOS_PRIVATE
 #include "intel_vbt_defs.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.c
rename to drivers/gpu/drm/i915/display/intel_rom.c
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.h b/drivers/gpu/drm/i915/display/intel_rom.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.h
rename to drivers/gpu/drm/i915/display/intel_rom.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 85642340a8fa..9331212117a1 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -195,11 +195,6 @@ subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
 	-I$(srctree)/drivers/gpu/drm/i915/display/ \
 	-Ddrm_i915_private=xe_device
 
-# Rule to build SOC code shared with i915
-$(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
-	$(call cmd,force_checksrc)
-	$(call if_changed_rule,cc_o_c)
-
 # Rule to build display code shared with i915
 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
 	$(call cmd,force_checksrc)
@@ -222,10 +217,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	display/xe_stolen.o \
 	display/xe_tdf.o
 
-# SOC code shared with i915
-xe-$(CONFIG_DRM_XE_DISPLAY) += \
-	i915-soc/intel_rom.o
-
 # Display code shared with i915
 xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/icl_dsi.o \
@@ -312,6 +303,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_psr.o \
 	i915-display/intel_qp_tables.o \
 	i915-display/intel_quirks.o \
+	i915-display/intel_rom.o \
 	i915-display/intel_snps_hdmi_pll.o \
 	i915-display/intel_snps_phy.o \
 	i915-display/intel_tc.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
deleted file mode 100644
index 05cbfb697b2b..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2024 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_rom.h"
-- 
2.47.3

[PATCH v2 08/13] drm/xe: remove remaining platform checks from compat i915_drv.h

[Jani Nikula]

With xe no longer building anything from soc/, we can remove the compat
platform checks from i915_drv.h, reducing the file to just the to_i915()
pointer conversion helper.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 3e79a74ff7de..04d1925f9a19 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -19,19 +19,4 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
 	return container_of(dev, struct drm_i915_private, drm);
 }
 
-/* compat platform checks only for soc/ usage */
-#define IS_PLATFORM(xe, x) ((xe)->info.platform == x)
-#define IS_I915G(dev_priv)	(dev_priv && 0)
-#define IS_I915GM(dev_priv)	(dev_priv && 0)
-#define IS_PINEVIEW(dev_priv)	(dev_priv && 0)
-#define IS_VALLEYVIEW(dev_priv)	(dev_priv && 0)
-#define IS_CHERRYVIEW(dev_priv)	(dev_priv && 0)
-#define IS_HASWELL(dev_priv)	(dev_priv && 0)
-#define IS_BROADWELL(dev_priv)	(dev_priv && 0)
-#define IS_BROXTON(dev_priv)	(dev_priv && 0)
-#define IS_GEMINILAKE(dev_priv)	(dev_priv && 0)
-#define IS_DG2(dev_priv)	IS_PLATFORM(dev_priv, XE_DG2)
-
-#define IS_MOBILE(xe) (xe && 0)
-
 #endif
-- 
2.47.3

[PATCH v2 09/13] drm/i915/gmch: split out i915_gmch.[ch] from soc

[Jani Nikula]

Most of the soc/intel_gmch.[ch] code is i915 core specific. Split it out
to i915_gmch.[ch].

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile         |   1 +
 drivers/gpu/drm/i915/i915_driver.c    |  11 +-
 drivers/gpu/drm/i915/i915_gmch.c      | 141 ++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_gmch.h      |  13 +++
 drivers/gpu/drm/i915/soc/intel_gmch.c | 132 ------------------------
 drivers/gpu/drm/i915/soc/intel_gmch.h |   3 -
 6 files changed, 160 insertions(+), 141 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_gmch.c
 create mode 100644 drivers/gpu/drm/i915/i915_gmch.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 12f948f0062c..c591e5ba47f9 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -30,6 +30,7 @@ i915-y += \
 	i915_edram.o \
 	i915_freq.o \
 	i915_getparam.o \
+	i915_gmch.o \
 	i915_ioctl.o \
 	i915_irq.o \
 	i915_mitigations.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 2369e2b55096..2e837865f829 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -88,8 +88,6 @@
 #include "pxp/intel_pxp_debugfs.h"
 #include "pxp/intel_pxp_pm.h"
 
-#include "soc/intel_gmch.h"
-
 #include "i915_debugfs.h"
 #include "i915_driver.h"
 #include "i915_drm_client.h"
@@ -97,6 +95,7 @@
 #include "i915_edram.h"
 #include "i915_file_private.h"
 #include "i915_getparam.h"
+#include "i915_gmch.h"
 #include "i915_hwmon.h"
 #include "i915_ioc32.h"
 #include "i915_ioctl.h"
@@ -323,7 +322,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	if (i915_inject_probe_failure(dev_priv))
 		return -ENODEV;
 
-	ret = intel_gmch_bridge_setup(dev_priv);
+	ret = i915_gmch_bridge_setup(dev_priv);
 	if (ret < 0)
 		return ret;
 
@@ -340,7 +339,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	}
 
 	/* Try to make sure MCHBAR is enabled before poking at it */
-	intel_gmch_bar_setup(dev_priv);
+	i915_gmch_bar_setup(dev_priv);
 	intel_device_info_runtime_init(dev_priv);
 	intel_display_device_info_runtime_init(display);
 
@@ -356,7 +355,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
 	return 0;
 
 err_uncore:
-	intel_gmch_bar_teardown(dev_priv);
+	i915_gmch_bar_teardown(dev_priv);
 
 	return ret;
 }
@@ -367,7 +366,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
  */
 static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
 {
-	intel_gmch_bar_teardown(dev_priv);
+	i915_gmch_bar_teardown(dev_priv);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/i915_gmch.c b/drivers/gpu/drm/i915/i915_gmch.c
new file mode 100644
index 000000000000..2d55831b3c58
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <linux/pnp.h>
+
+#include <drm/drm_managed.h>
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_gmch.h"
+#include "intel_pci_config.h"
+
+static void i915_gmch_bridge_release(struct drm_device *dev, void *bridge)
+{
+	pci_dev_put(bridge);
+}
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915)
+{
+	int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
+
+	i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
+	if (!i915->gmch.pdev) {
+		drm_err(&i915->drm, "bridge device not found\n");
+		return -EIO;
+	}
+
+	return drmm_add_action_or_reset(&i915->drm, i915_gmch_bridge_release,
+					i915->gmch.pdev);
+}
+
+static int mchbar_reg(struct drm_i915_private *i915)
+{
+	return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+}
+
+/* Allocate space for the MCH regs if needed, return nonzero on error */
+static int
+intel_alloc_mchbar_resource(struct drm_i915_private *i915)
+{
+	u32 temp_lo, temp_hi = 0;
+	u64 mchbar_addr;
+	int ret;
+
+	if (GRAPHICS_VER(i915) >= 4)
+		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
+	pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
+	mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
+
+	/* If ACPI doesn't have it, assume we need to allocate it ourselves */
+	if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
+	    pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
+		return 0;
+
+	/* Get some space for it */
+	i915->gmch.mch_res.name = "i915 MCHBAR";
+	i915->gmch.mch_res.flags = IORESOURCE_MEM;
+	ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
+				     &i915->gmch.mch_res,
+				     MCHBAR_SIZE, MCHBAR_SIZE,
+				     PCIBIOS_MIN_MEM,
+				     0, pcibios_align_resource,
+				     i915->gmch.pdev);
+	if (ret) {
+		drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
+		i915->gmch.mch_res.start = 0;
+		return ret;
+	}
+
+	if (GRAPHICS_VER(i915) >= 4)
+		pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
+				       upper_32_bits(i915->gmch.mch_res.start));
+
+	pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+			       lower_32_bits(i915->gmch.mch_res.start));
+	return 0;
+}
+
+/* Setup MCHBAR if possible, return true if we should disable it again */
+void i915_gmch_bar_setup(struct drm_i915_private *i915)
+{
+	u32 temp;
+	bool enabled;
+
+	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		return;
+
+	i915->gmch.mchbar_need_disable = false;
+
+	if (IS_I915G(i915) || IS_I915GM(i915)) {
+		pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
+		enabled = !!(temp & DEVEN_MCHBAR_EN);
+	} else {
+		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+		enabled = temp & 1;
+	}
+
+	/* If it's already enabled, don't have to do anything */
+	if (enabled)
+		return;
+
+	if (intel_alloc_mchbar_resource(i915))
+		return;
+
+	i915->gmch.mchbar_need_disable = true;
+
+	/* Space is allocated or reserved, so enable it. */
+	if (IS_I915G(i915) || IS_I915GM(i915)) {
+		pci_write_config_dword(i915->gmch.pdev, DEVEN,
+				       temp | DEVEN_MCHBAR_EN);
+	} else {
+		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+		pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
+	}
+}
+
+void i915_gmch_bar_teardown(struct drm_i915_private *i915)
+{
+	if (i915->gmch.mchbar_need_disable) {
+		if (IS_I915G(i915) || IS_I915GM(i915)) {
+			u32 deven_val;
+
+			pci_read_config_dword(i915->gmch.pdev, DEVEN,
+					      &deven_val);
+			deven_val &= ~DEVEN_MCHBAR_EN;
+			pci_write_config_dword(i915->gmch.pdev, DEVEN,
+					       deven_val);
+		} else {
+			u32 mchbar_val;
+
+			pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+					      &mchbar_val);
+			mchbar_val &= ~1;
+			pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+					       mchbar_val);
+		}
+	}
+
+	if (i915->gmch.mch_res.start)
+		release_resource(&i915->gmch.mch_res);
+}
diff --git a/drivers/gpu/drm/i915/i915_gmch.h b/drivers/gpu/drm/i915/i915_gmch.h
new file mode 100644
index 000000000000..3ae50bef04ea
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_GMCH_H__
+#define __I915_GMCH_H__
+
+struct drm_i915_private;
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_teardown(struct drm_i915_private *i915);
+
+#endif /* __I915_GMCH_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 271da30c8290..30f489417064 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -4,10 +4,8 @@
  */
 
 #include <linux/pci.h>
-#include <linux/pnp.h>
 #include <linux/vgaarb.h>
 
-#include <drm/drm_managed.h>
 #include <drm/drm_print.h>
 #include <drm/intel/i915_drm.h>
 
@@ -17,136 +15,6 @@
 #include "intel_gmch.h"
 #include "intel_pci_config.h"
 
-static void intel_gmch_bridge_release(struct drm_device *dev, void *bridge)
-{
-	pci_dev_put(bridge);
-}
-
-int intel_gmch_bridge_setup(struct drm_i915_private *i915)
-{
-	int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
-
-	i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
-	if (!i915->gmch.pdev) {
-		drm_err(&i915->drm, "bridge device not found\n");
-		return -EIO;
-	}
-
-	return drmm_add_action_or_reset(&i915->drm, intel_gmch_bridge_release,
-					i915->gmch.pdev);
-}
-
-static int mchbar_reg(struct drm_i915_private *i915)
-{
-	return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
-}
-
-/* Allocate space for the MCH regs if needed, return nonzero on error */
-static int
-intel_alloc_mchbar_resource(struct drm_i915_private *i915)
-{
-	u32 temp_lo, temp_hi = 0;
-	u64 mchbar_addr;
-	int ret;
-
-	if (GRAPHICS_VER(i915) >= 4)
-		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
-	pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
-	mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
-
-	/* If ACPI doesn't have it, assume we need to allocate it ourselves */
-	if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
-	    pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
-		return 0;
-
-	/* Get some space for it */
-	i915->gmch.mch_res.name = "i915 MCHBAR";
-	i915->gmch.mch_res.flags = IORESOURCE_MEM;
-	ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
-				     &i915->gmch.mch_res,
-				     MCHBAR_SIZE, MCHBAR_SIZE,
-				     PCIBIOS_MIN_MEM,
-				     0, pcibios_align_resource,
-				     i915->gmch.pdev);
-	if (ret) {
-		drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
-		i915->gmch.mch_res.start = 0;
-		return ret;
-	}
-
-	if (GRAPHICS_VER(i915) >= 4)
-		pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
-				       upper_32_bits(i915->gmch.mch_res.start));
-
-	pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
-			       lower_32_bits(i915->gmch.mch_res.start));
-	return 0;
-}
-
-/* Setup MCHBAR if possible, return true if we should disable it again */
-void intel_gmch_bar_setup(struct drm_i915_private *i915)
-{
-	u32 temp;
-	bool enabled;
-
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
-		return;
-
-	i915->gmch.mchbar_need_disable = false;
-
-	if (IS_I915G(i915) || IS_I915GM(i915)) {
-		pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
-		enabled = !!(temp & DEVEN_MCHBAR_EN);
-	} else {
-		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
-		enabled = temp & 1;
-	}
-
-	/* If it's already enabled, don't have to do anything */
-	if (enabled)
-		return;
-
-	if (intel_alloc_mchbar_resource(i915))
-		return;
-
-	i915->gmch.mchbar_need_disable = true;
-
-	/* Space is allocated or reserved, so enable it. */
-	if (IS_I915G(i915) || IS_I915GM(i915)) {
-		pci_write_config_dword(i915->gmch.pdev, DEVEN,
-				       temp | DEVEN_MCHBAR_EN);
-	} else {
-		pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
-		pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
-	}
-}
-
-void intel_gmch_bar_teardown(struct drm_i915_private *i915)
-{
-	if (i915->gmch.mchbar_need_disable) {
-		if (IS_I915G(i915) || IS_I915GM(i915)) {
-			u32 deven_val;
-
-			pci_read_config_dword(i915->gmch.pdev, DEVEN,
-					      &deven_val);
-			deven_val &= ~DEVEN_MCHBAR_EN;
-			pci_write_config_dword(i915->gmch.pdev, DEVEN,
-					       deven_val);
-		} else {
-			u32 mchbar_val;
-
-			pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
-					      &mchbar_val);
-			mchbar_val &= ~1;
-			pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
-					       mchbar_val);
-		}
-	}
-
-	if (i915->gmch.mch_res.start)
-		release_resource(&i915->gmch.mch_res);
-}
-
 int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
 {
 	struct intel_display *display = i915->display;
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index 23be2d113afd..907e1ae921e0 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -11,9 +11,6 @@
 struct pci_dev;
 struct drm_i915_private;
 
-int intel_gmch_bridge_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_teardown(struct drm_i915_private *i915);
 int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
 unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
 
-- 
2.47.3

[PATCH v2 10/13] drm/i915/gmch: switch to use pci_bus_{read, write}_config_word()

[Jani Nikula]

Switch to use pci_bus_{read,write}_config_word(), and stop using
i915->gmch.pdev reference for the bridge.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/soc/intel_gmch.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 30f489417064..d43b5d89cae7 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -18,10 +18,11 @@
 int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
 {
 	struct intel_display *display = i915->display;
+	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
 	unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
 	u16 gmch_ctrl;
 
-	if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) {
+	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
 		drm_err(&i915->drm, "failed to read control word\n");
 		return -EIO;
 	}
@@ -34,7 +35,7 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
 	else
 		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
 
-	if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) {
+	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
 		drm_err(&i915->drm, "failed to write control word\n");
 		return -EIO;
 	}
-- 
2.47.3

[PATCH v2 11/13] drm/i915/gmch: convert intel_gmch.c to struct intel_display

[Jani Nikula]

Convert intel_gmch.[ch] to struct intel_display. Remove the final
dependency on struct drm_i915_private and i915_drv.h. This is in
preparation of moving the code under display/.

intel_gmch_vga_set_state() is only used internally, make it static while
at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/soc/intel_gmch.c | 13 ++++++-------
 drivers/gpu/drm/i915/soc/intel_gmch.h |  2 --
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index d43b5d89cae7..4e7abe056551 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -10,20 +10,19 @@
 #include <drm/intel/i915_drm.h>
 
 #include "../display/intel_display_core.h" /* FIXME */
+#include "../display/intel_display_types.h" /* FIXME */
 
-#include "i915_drv.h"
 #include "intel_gmch.h"
 #include "intel_pci_config.h"
 
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
+static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
 {
-	struct intel_display *display = i915->display;
 	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
 	unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
 	u16 gmch_ctrl;
 
 	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
-		drm_err(&i915->drm, "failed to read control word\n");
+		drm_err(display->drm, "failed to read control word\n");
 		return -EIO;
 	}
 
@@ -36,7 +35,7 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
 		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
 
 	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
-		drm_err(&i915->drm, "failed to write control word\n");
+		drm_err(display->drm, "failed to write control word\n");
 		return -EIO;
 	}
 
@@ -45,9 +44,9 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
 
 unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
 {
-	struct drm_i915_private *i915 = pdev_to_i915(pdev);
+	struct intel_display *display = to_intel_display(pdev);
 
-	intel_gmch_vga_set_state(i915, enable_decode);
+	intel_gmch_vga_set_state(display, enable_decode);
 
 	if (enable_decode)
 		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index 907e1ae921e0..bc3421ab5ba6 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -9,9 +9,7 @@
 #include <linux/types.h>
 
 struct pci_dev;
-struct drm_i915_private;
 
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
 unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
 
 #endif /* __INTEL_GMCH_H__ */
-- 
2.47.3

[PATCH v2 12/13] drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c

[Jani Nikula]

The sole user of the remaining functions in intel_gmch.[ch] is in
intel_vga.c. Move everything there.

Since intel_gmch.c hasn't been part of xe, use a dummy function
relocated from xe_display_misc.c, with #ifdef. This is purely to keep
this change non-functional.

This allows us to remove soc/intel_gmch.[ch] from i915, compat
soc/intel_gmch.h from xe, and xe_display_misc.c from xe.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |  4 --
 drivers/gpu/drm/i915/display/intel_vga.c      | 52 ++++++++++++++++-
 drivers/gpu/drm/i915/soc/intel_gmch.c         | 56 -------------------
 drivers/gpu/drm/i915/soc/intel_gmch.h         | 15 -----
 drivers/gpu/drm/xe/Makefile                   |  1 -
 .../xe/compat-i915-headers/soc/intel_gmch.h   |  6 --
 drivers/gpu/drm/xe/display/xe_display_misc.c  | 16 ------
 7 files changed, 50 insertions(+), 100 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.c
 delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
 delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c591e5ba47f9..2ff8938b3a7c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -57,10 +57,6 @@ i915-y += \
 	vlv_iosf_sb.o \
 	vlv_suspend.o
 
-# core peripheral code
-i915-y += \
-	soc/intel_gmch.o
-
 # core library code
 i915-y += \
 	i915_memcpy.o \
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 6e125564db34..5e516c79e2f7 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -9,12 +9,12 @@
 
 #include <drm/drm_device.h>
 #include <drm/drm_print.h>
+#include <drm/intel/i915_drm.h>
 #include <video/vga.h>
 
-#include "soc/intel_gmch.h"
-
 #include "intel_de.h"
 #include "intel_display.h"
+#include "intel_display_types.h"
 #include "intel_vga.h"
 #include "intel_vga_regs.h"
 
@@ -95,6 +95,54 @@ void intel_vga_reset_io_mem(struct intel_display *display)
 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
 }
 
+#ifdef I915
+static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
+{
+	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
+	unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
+	u16 gmch_ctrl;
+
+	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
+		drm_err(display->drm, "failed to read control word\n");
+		return -EIO;
+	}
+
+	if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
+		return 0;
+
+	if (enable_decode)
+		gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
+	else
+		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
+
+	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
+		drm_err(display->drm, "failed to write control word\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
+{
+	struct intel_display *display = to_intel_display(pdev);
+
+	intel_gmch_vga_set_state(display, enable_decode);
+
+	if (enable_decode)
+		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	else
+		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
+#else
+static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
+{
+	/* ToDo: Implement the actual handling of vga decode */
+	return 0;
+}
+#endif
+
 int intel_vga_register(struct intel_display *display)
 {
 
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
deleted file mode 100644
index 4e7abe056551..000000000000
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ /dev/null
@@ -1,56 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include <linux/pci.h>
-#include <linux/vgaarb.h>
-
-#include <drm/drm_print.h>
-#include <drm/intel/i915_drm.h>
-
-#include "../display/intel_display_core.h" /* FIXME */
-#include "../display/intel_display_types.h" /* FIXME */
-
-#include "intel_gmch.h"
-#include "intel_pci_config.h"
-
-static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
-{
-	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
-	unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
-	u16 gmch_ctrl;
-
-	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
-		drm_err(display->drm, "failed to read control word\n");
-		return -EIO;
-	}
-
-	if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
-		return 0;
-
-	if (enable_decode)
-		gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
-	else
-		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
-
-	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
-		drm_err(display->drm, "failed to write control word\n");
-		return -EIO;
-	}
-
-	return 0;
-}
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
-	struct intel_display *display = to_intel_display(pdev);
-
-	intel_gmch_vga_set_state(display, enable_decode);
-
-	if (enable_decode)
-		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
-		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
-	else
-		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
-}
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
deleted file mode 100644
index bc3421ab5ba6..000000000000
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __INTEL_GMCH_H__
-#define __INTEL_GMCH_H__
-
-#include <linux/types.h>
-
-struct pci_dev;
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
-
-#endif /* __INTEL_GMCH_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 9331212117a1..b848da79a4e1 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -206,7 +206,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	display/intel_fb_bo.o \
 	display/intel_fbdev_fb.o \
 	display/xe_display.o \
-	display/xe_display_misc.o \
 	display/xe_display_rpm.o \
 	display/xe_display_wa.o \
 	display/xe_dsb_buffer.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
deleted file mode 100644
index 33c5257b3a71..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_gmch.h"
diff --git a/drivers/gpu/drm/xe/display/xe_display_misc.c b/drivers/gpu/drm/xe/display/xe_display_misc.c
deleted file mode 100644
index 242c2ef4ca93..000000000000
--- a/drivers/gpu/drm/xe/display/xe_display_misc.c
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "intel_display_types.h"
-
-struct pci_dev;
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
-	/* ToDo: Implement the actual handling of vga decode */
-	return 0;
-}
-- 
2.47.3

[PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915

[Jani Nikula]

Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
both i915 and xe.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vga.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 5e516c79e2f7..c45c4bbc3f95 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -95,7 +95,6 @@ void intel_vga_reset_io_mem(struct intel_display *display)
 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
 }
 
-#ifdef I915
 static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
 {
 	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
@@ -135,13 +134,6 @@ static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_
 	else
 		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
 }
-#else
-static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
-	/* ToDo: Implement the actual handling of vga decode */
-	return 0;
-}
-#endif
 
 int intel_vga_register(struct intel_display *display)
 {
-- 
2.47.3

✗ i915.CI.BAT: failure for drm/i915: dissolve soc/

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 9742 bytes --]

== Series Details ==

Series: drm/i915: dissolve soc/
URL   : https://patchwork.freedesktop.org/series/157793/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17572 -> Patchwork_157793v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_157793v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_157793v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/index.html

Participating hosts (45 -> 44)
------------------------------

  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_157793v1:

### IGT changes ###

#### Possible regressions ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-twl-2:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-2/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-adlp-9:         [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-adlp-9/igt@core_hotunplug@unbind-rebind.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-adlp-9/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_module_load@load:
    - bat-adlp-9:         [PASS][5] -> [DMESG-WARN][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-adlp-9/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-adlp-9/igt@i915_module_load@load.html
    - bat-twl-2:          [PASS][7] -> [DMESG-WARN][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-2/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-2/igt@i915_module_load@load.html

  * igt@i915_selftest@live@coherency:
    - bat-adlp-11:        [PASS][9] -> [DMESG-WARN][10] +41 other tests dmesg-warn
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-adlp-11/igt@i915_selftest@live@coherency.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-adlp-11/igt@i915_selftest@live@coherency.html

  * igt@i915_selftest@live@sanitycheck:
    - bat-twl-1:          [PASS][11] -> [DMESG-WARN][12] +41 other tests dmesg-warn
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-1/igt@i915_selftest@live@sanitycheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-1/igt@i915_selftest@live@sanitycheck.html
    - bat-rplp-1:         [PASS][13] -> [DMESG-WARN][14] +41 other tests dmesg-warn
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-rplp-1/igt@i915_selftest@live@sanitycheck.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-rplp-1/igt@i915_selftest@live@sanitycheck.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1:
    - bat-twl-2:          [PASS][15] -> [FAIL][16] +65 other tests fail
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-2/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-2/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-a-dp-1:
    - bat-adlp-9:         [PASS][17] -> [FAIL][18] +68 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-adlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-a-dp-1.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-adlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-a-dp-1.html

  * igt@kms_pipe_crc_basic@hang-read-crc:
    - bat-rplp-1:         [PASS][19] -> [FAIL][20] +64 other tests fail
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-rplp-1/igt@kms_pipe_crc_basic@hang-read-crc.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-rplp-1/igt@kms_pipe_crc_basic@hang-read-crc.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-twl-2:          [PASS][21] -> [INCOMPLETE][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-2/igt@kms_pm_backlight@basic-brightness.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-2/igt@kms_pm_backlight@basic-brightness.html
    - bat-twl-1:          [PASS][23] -> [INCOMPLETE][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-1/igt@kms_pm_backlight@basic-brightness.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-1/igt@kms_pm_backlight@basic-brightness.html
    - bat-rplp-1:         [PASS][25] -> [INCOMPLETE][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-rplp-1/igt@kms_pm_backlight@basic-brightness.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-primary-page-flip@edp-1:
    - bat-twl-1:          [PASS][27] -> [FAIL][28] +62 other tests fail
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-1/igt@kms_psr@psr-primary-page-flip@edp-1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-1/igt@kms_psr@psr-primary-page-flip@edp-1.html

  
Known issues
------------

  Here are the changes found in Patchwork_157793v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-6:         [PASS][29] -> [DMESG-FAIL][30] ([i915#12061]) +1 other test dmesg-fail
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
    - bat-dg2-9:          [PASS][31] -> [DMESG-FAIL][32] ([i915#12061]) +1 other test dmesg-fail
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-dg2-9/igt@i915_selftest@live@workarounds.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-dg2-9/igt@i915_selftest@live@workarounds.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-twl-2:          [PASS][33] -> [SKIP][34] ([i915#3708])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-2/igt@prime_vgem@basic-fence-flip.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-2/igt@prime_vgem@basic-fence-flip.html
    - bat-adlp-9:         [PASS][35] -> [SKIP][36] ([i915#3708])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-adlp-9/igt@prime_vgem@basic-fence-flip.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-adlp-9/igt@prime_vgem@basic-fence-flip.html
    - bat-twl-1:          [PASS][37] -> [SKIP][38] ([i915#3708])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-twl-1/igt@prime_vgem@basic-fence-flip.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-twl-1/igt@prime_vgem@basic-fence-flip.html
    - bat-rplp-1:         [PASS][39] -> [SKIP][40] ([i915#3708])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-rplp-1/igt@prime_vgem@basic-fence-flip.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-rplp-1/igt@prime_vgem@basic-fence-flip.html

  
#### Possible fixes ####

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [DMESG-FAIL][41] ([i915#12061]) -> [PASS][42] +1 other test pass
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-mtlp-8/igt@i915_selftest@live.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-mtlp-8/igt@i915_selftest@live.html
    - bat-jsl-1:          [DMESG-FAIL][43] ([i915#15281]) -> [PASS][44] +1 other test pass
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-jsl-1/igt@i915_selftest@live.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-jsl-1/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [DMESG-FAIL][45] ([i915#12061]) -> [PASS][46] +1 other test pass
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-arls-6:         [DMESG-FAIL][47] ([i915#12061]) -> [PASS][48] +1 other test pass
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17572/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/bat-arls-6/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#15281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15281
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708


Build changes
-------------

  * Linux: CI_DRM_17572 -> Patchwork_157793v1

  CI-20190529: 20190529
  CI_DRM_17572: a95032b2166b5ae428c065917b843a1caf1e82b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8633: 8633
  Patchwork_157793v1: a95032b2166b5ae428c065917b843a1caf1e82b8 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v1/index.html

[-- Attachment #2: Type: text/html, Size: 11262 bytes --]

Re: [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display

[Jani Nikula]

On Wed, 19 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> Convert everything except uncore access to struct intel_display.
>
> While at it, convert logging to drm_dbg_kms().
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c        |   2 +-
>  drivers/gpu/drm/i915/display/intel_bw.c       |   2 +-
>  drivers/gpu/drm/i915/display/intel_cdclk.c    |   4 +-
>  .../drm/i915/display/intel_display_power.c    |   2 +-
>  drivers/gpu/drm/i915/display/intel_dram.c     | 205 +++++++++---------
>  drivers/gpu/drm/i915/display/intel_dram.h     |  11 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c  |   4 +-
>  drivers/gpu/drm/i915/i915_driver.c            |   2 +-
>  drivers/gpu/drm/xe/display/xe_display.c       |   2 +-
>  9 files changed, 120 insertions(+), 114 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 27e2d73bc505..167277cd8877 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
>  
>  static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
>  {
> -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> +	const struct dram_info *dram_info = intel_dram_info(display);
>  	bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
>  	int i;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 957c90e62569..d27835ed49c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
>  
>  void intel_bw_init_hw(struct intel_display *display)
>  {
> -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> +	const struct dram_info *dram_info = intel_dram_info(display);
>  
>  	if (!HAS_DISPLAY(display))
>  		return;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 531819391c8c..5c90e53b4e46 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
>  
>  static int i9xx_hrawclk(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
> -
>  	/* hrawclock is 1/4 the FSB frequency */
> -	return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
> +	return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 9c5f0277d8c2..08db9bbbfcb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
>  
>  static void tgl_bw_buddy_init(struct intel_display *display)
>  {
> -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> +	const struct dram_info *dram_info = intel_dram_info(display);
>  	const struct buddy_page_mask *table;
>  	unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
>  	int config, i;
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> index 7142772f2a6e..3dfcc7938740 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
>  
>  #undef DRAM_TYPE_STR
>  
> -static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
> +static enum intel_dram_type pnv_dram_type(struct intel_display *display)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
>  	return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
>  		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
>  }
>  
> -static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int pnv_mem_freq(struct intel_display *display)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 tmp;
>  
>  	tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
> @@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
>  	return 0;
>  }
>  
> -static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_mem_freq(struct intel_display *display)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u16 ddrpll;
>  
>  	ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
> @@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
>  	case 0x18:
>  		return 1600000;
>  	default:
> -		drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
> -			ddrpll & 0xff);
> +		drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
> +			    ddrpll & 0xff);
>  		return 0;
>  	}
>  }
>  
> -static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int chv_mem_freq(struct intel_display *display)
>  {
>  	u32 val;
>  
> -	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> -	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> -	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> +	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
> +	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> +	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
>  
>  	switch ((val >> 2) & 0x7) {
>  	case 3:
> @@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
>  	}
>  }
>  
> -static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int vlv_mem_freq(struct intel_display *display)
>  {
>  	u32 val;
>  
> -	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> -	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> -	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> +	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> +	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> +	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
>  
>  	switch ((val >> 6) & 3) {
>  	case 0:
> @@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
>  	return 0;
>  }
>  
> -unsigned int intel_mem_freq(struct drm_i915_private *i915)
> +unsigned int intel_mem_freq(struct intel_display *display)
>  {
> -	if (IS_PINEVIEW(i915))
> -		return pnv_mem_freq(i915);
> -	else if (GRAPHICS_VER(i915) == 5)
> -		return ilk_mem_freq(i915);
> -	else if (IS_CHERRYVIEW(i915))
> -		return chv_mem_freq(i915);
> -	else if (IS_VALLEYVIEW(i915))
> -		return vlv_mem_freq(i915);
> +	if (display->platform.pineview)
> +		return pnv_mem_freq(display);
> +	else if (DISPLAY_VER(display) == 5)
> +		return ilk_mem_freq(display);
> +	else if (display->platform.cherryview)
> +		return chv_mem_freq(display);
> +	else if (display->platform.valleyview)
> +		return vlv_mem_freq(display);
>  	else
>  		return 0;
>  }
>  
> -static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> +static unsigned int i9xx_fsb_freq(struct intel_display *display)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 fsb;
>  
>  	/*
> @@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
>  	 */
>  	fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
>  
> -	if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
> +	if (display->platform.pineview || display->platform.mobile) {
>  		switch (fsb) {
>  		case CLKCFG_FSB_400:
>  			return 400000;
> @@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
>  	}
>  }
>  
> -static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_fsb_freq(struct intel_display *display)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u16 fsb;
>  
>  	fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
> @@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
>  	case 0x018:
>  		return 6400000;
>  	default:
> -		drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
> +		drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
>  		return 0;
>  	}
>  }
>  
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915)
> +unsigned int intel_fsb_freq(struct intel_display *display)
>  {
> -	if (GRAPHICS_VER(i915) == 5)
> -		return ilk_fsb_freq(i915);
> -	else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
> -		return i9xx_fsb_freq(i915);
> +	if (DISPLAY_VER(display) == 5)
> +		return ilk_fsb_freq(display);
> +	else if (IS_DISPLAY_VER(display, 3, 4))
> +		return i9xx_fsb_freq(display);
>  	else
>  		return 0;
>  }
>  
> -static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	dram_info->fsb_freq = intel_fsb_freq(i915);
> +	dram_info->fsb_freq = intel_fsb_freq(display);
>  	if (dram_info->fsb_freq)
> -		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> +		drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
>  
> -	dram_info->mem_freq = intel_mem_freq(i915);
> +	dram_info->mem_freq = intel_mem_freq(display);
>  	if (dram_info->mem_freq)
> -		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> +		drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
>  
> -	if (IS_PINEVIEW(i915))
> -		dram_info->type = pnv_dram_type(i915);
> +	if (display->platform.pineview)
> +		dram_info->type = pnv_dram_type(display);
>  
>  	return 0;
>  }
> @@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
>  }
>  
>  static void
> -skl_dram_print_dimm_info(struct drm_i915_private *i915,
> +skl_dram_print_dimm_info(struct intel_display *display,
>  			 struct dram_dimm_info *dimm,
>  			 int channel, char dimm_name)
>  {
> -	drm_dbg_kms(&i915->drm,
> +	drm_dbg_kms(display->drm,
>  		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
>  		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
>  		    str_yes_no(skl_is_16gb_dimm(dimm)));
>  }
>  
>  static void
> -skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> +skl_dram_get_dimm_l_info(struct intel_display *display,
>  			 struct dram_dimm_info *dimm,
>  			 int channel, u32 val)
>  {
> -	if (GRAPHICS_VER(i915) >= 11) {
> +	if (DISPLAY_VER(display) >= 11) {
>  		dimm->size = icl_get_dimm_l_size(val);
>  		dimm->width = icl_get_dimm_l_width(val);
>  		dimm->ranks = icl_get_dimm_l_ranks(val);
> @@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
>  		dimm->ranks = skl_get_dimm_l_ranks(val);
>  	}
>  
> -	skl_dram_print_dimm_info(i915, dimm, channel, 'L');
> +	skl_dram_print_dimm_info(display, dimm, channel, 'L');
>  }
>  
>  static void
> -skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> +skl_dram_get_dimm_s_info(struct intel_display *display,
>  			 struct dram_dimm_info *dimm,
>  			 int channel, u32 val)
>  {
> -	if (GRAPHICS_VER(i915) >= 11) {
> +	if (DISPLAY_VER(display) >= 11) {
>  		dimm->size = icl_get_dimm_s_size(val);
>  		dimm->width = icl_get_dimm_s_width(val);
>  		dimm->ranks = icl_get_dimm_s_ranks(val);
> @@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
>  		dimm->ranks = skl_get_dimm_s_ranks(val);
>  	}
>  
> -	skl_dram_print_dimm_info(i915, dimm, channel, 'S');
> +	skl_dram_print_dimm_info(display, dimm, channel, 'S');
>  }
>  
>  static int
> -skl_dram_get_channel_info(struct drm_i915_private *i915,
> +skl_dram_get_channel_info(struct intel_display *display,
>  			  struct dram_channel_info *ch,
>  			  int channel, u32 val)
>  {
> -	skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
> -	skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
> +	skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
> +	skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
>  
>  	if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
> -		drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
> +		drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
>  		return -EINVAL;
>  	}
>  
> @@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
>  	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
>  		skl_is_16gb_dimm(&ch->dimm_s);
>  
> -	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> +	drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
>  		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
>  
>  	return 0;
> @@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
>  }
>  
>  static int
> -skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct dram_channel_info ch0 = {}, ch1 = {};
>  	u32 val;
>  	int ret;
> @@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>  
>  	val = intel_uncore_read(&i915->uncore,
>  				SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> -	ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
> +	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
>  	if (ret == 0)
>  		dram_info->num_channels++;
>  
>  	val = intel_uncore_read(&i915->uncore,
>  				SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> -	ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
> +	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
>  	if (ret == 0)
>  		dram_info->num_channels++;
>  
>  	if (dram_info->num_channels == 0) {
> -		drm_info(&i915->drm, "Number of memory channels is zero\n");
> +		drm_info(display->drm, "Number of memory channels is zero\n");
>  		return -EINVAL;
>  	}
>  
>  	if (ch0.ranks == 0 && ch1.ranks == 0) {
> -		drm_info(&i915->drm, "couldn't get memory rank information\n");
> +		drm_info(display->drm, "couldn't get memory rank information\n");
>  		return -EINVAL;
>  	}
>  
> @@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>  
>  	dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
>  
> -	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
> +	drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
>  		    str_yes_no(dram_info->symmetric_memory));
>  
> -	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
> +	drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
>  		    str_yes_no(dram_info->has_16gb_dimms));
>  
>  	return 0;
>  }
>  
>  static enum intel_dram_type
> -skl_get_dram_type(struct drm_i915_private *i915)
> +skl_get_dram_type(struct intel_display *display)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 val;
>  
>  	val = intel_uncore_read(&i915->uncore,
> @@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
>  }
>  
>  static int
> -skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
>  	int ret;
>  
> -	dram_info->type = skl_get_dram_type(i915);
> +	dram_info->type = skl_get_dram_type(display);
>  
> -	ret = skl_dram_get_channels_info(i915, dram_info);
> +	ret = skl_dram_get_channels_info(display, dram_info);
>  	if (ret)
>  		return ret;
>  
> @@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
>  	dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
>  }
>  
> -static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 val;
>  	u8 valid_ranks = 0;
>  	int i;
> @@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
>  		bxt_get_dimm_info(&dimm, val);
>  		type = bxt_get_dimm_type(val);
>  
> -		drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
> +		drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
>  			    dram_info->type != INTEL_DRAM_UNKNOWN &&
>  			    dram_info->type != type);
>  
> -		drm_dbg_kms(&i915->drm,
> +		drm_dbg_kms(display->drm,
>  			    "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
>  			    i - BXT_D_CR_DRP0_DUNIT_START,
>  			    dimm.size, dimm.width, dimm.ranks);
> @@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
>  	}
>  
>  	if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
> -		drm_info(&i915->drm, "couldn't get memory information\n");
> +		drm_info(display->drm, "couldn't get memory information\n");
>  		return -EINVAL;
>  	}
>  
>  	return 0;
>  }
>  
> -static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> +static int icl_pcode_read_mem_global_info(struct intel_display *display,
>  					  struct dram_info *dram_info)
>  {
>  	u32 val = 0;
>  	int ret;
>  
> -	ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> +	ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
>  			       ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
>  	if (ret)
>  		return ret;
>  
> -	if (GRAPHICS_VER(dev_priv) == 12) {
> +	if (DISPLAY_VER(display) == 12) {

CI tells me this goes south on e.g. ADL-P (or TWL) which has graphics
version 12 but display version 13.

What to do.


BR,
Jani.

>  		switch (val & 0xf) {
>  		case 0:
>  			dram_info->type = INTEL_DRAM_DDR4;
> @@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
>  	return 0;
>  }
>  
> -static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
>  	int ret;
>  
> -	ret = skl_dram_get_channels_info(i915, dram_info);
> +	ret = skl_dram_get_channels_info(display, dram_info);
>  	if (ret)
>  		return ret;
>  
> -	return icl_pcode_read_mem_global_info(i915, dram_info);
> +	return icl_pcode_read_mem_global_info(display, dram_info);
>  }
>  
> -static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	return icl_pcode_read_mem_global_info(i915, dram_info);
> +	return icl_pcode_read_mem_global_info(display, dram_info);
>  }
>  
> -static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	struct intel_display *display = i915->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
>  
>  	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
> @@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
>  		dram_info->type = INTEL_DRAM_LPDDR3;
>  		break;
>  	case 8:
> -		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> +		drm_WARN_ON(display->drm, !display->platform.dgfx);
>  		dram_info->type = INTEL_DRAM_GDDR;
>  		break;
>  	case 9:
> -		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> +		drm_WARN_ON(display->drm, !display->platform.dgfx);
>  		dram_info->type = INTEL_DRAM_GDDR_ECC;
>  		break;
>  	default:
> @@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
>  	return 0;
>  }
>  
> -int intel_dram_detect(struct drm_i915_private *i915)
> +int intel_dram_detect(struct intel_display *display)
>  {
> -	struct intel_display *display = i915->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct dram_info *dram_info;
>  	int ret;
>  
> -	if (IS_DG2(i915) || !intel_display_device_present(display))
> +	if (display->platform.dg2 || !HAS_DISPLAY(display))
>  		return 0;
>  
> -	dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> +	dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
>  	if (!dram_info)
>  		return -ENOMEM;
>  
>  	i915->dram_info = dram_info;
>  
>  	if (DISPLAY_VER(display) >= 14)
> -		ret = xelpdp_get_dram_info(i915, dram_info);
> -	else if (GRAPHICS_VER(i915) >= 12)
> -		ret = gen12_get_dram_info(i915, dram_info);
> -	else if (GRAPHICS_VER(i915) >= 11)
> -		ret = gen11_get_dram_info(i915, dram_info);
> -	else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
> -		ret = bxt_get_dram_info(i915, dram_info);
> -	else if (GRAPHICS_VER(i915) >= 9)
> -		ret = skl_get_dram_info(i915, dram_info);
> +		ret = xelpdp_get_dram_info(display, dram_info);
> +	else if (DISPLAY_VER(display) >= 12)
> +		ret = gen12_get_dram_info(display, dram_info);
> +	else if (DISPLAY_VER(display) >= 11)
> +		ret = gen11_get_dram_info(display, dram_info);
> +	else if (display->platform.broxton || display->platform.geminilake)
> +		ret = bxt_get_dram_info(display, dram_info);
> +	else if (DISPLAY_VER(display) >= 9)
> +		ret = skl_get_dram_info(display, dram_info);
>  	else
> -		ret = i915_get_dram_info(i915, dram_info);
> +		ret = i915_get_dram_info(display, dram_info);
>  
> -	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
> +	drm_dbg_kms(display->drm, "DRAM type: %s\n",
>  		    intel_dram_type_str(dram_info->type));
>  
> -	drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
> +	drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
>  
> -	drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> -	drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> +	drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> +	drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
>  
>  	/* TODO: Do we want to abort probe on dram detection failures? */
>  	if (ret)
> @@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
>   * checks, and prefer not dereferencing on platforms that shouldn't look at dram
>   * info, to catch accidental and incorrect dram info checks.
>   */
> -const struct dram_info *intel_dram_info(struct drm_device *drm)
> +const struct dram_info *intel_dram_info(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(drm);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
>  	return i915->dram_info;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
> index 58aaf2f91afe..5800b7b4e614 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.h
> +++ b/drivers/gpu/drm/i915/display/intel_dram.h
> @@ -8,8 +8,7 @@
>  
>  #include <linux/types.h>
>  
> -struct drm_i915_private;
> -struct drm_device;
> +struct intel_display;
>  
>  struct dram_info {
>  	enum intel_dram_type {
> @@ -35,10 +34,10 @@ struct dram_info {
>  	bool has_16gb_dimms;
>  };
>  
> -int intel_dram_detect(struct drm_i915_private *i915);
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915);
> -unsigned int intel_mem_freq(struct drm_i915_private *i915);
> -const struct dram_info *intel_dram_info(struct drm_device *drm);
> +int intel_dram_detect(struct intel_display *display);
> +unsigned int intel_fsb_freq(struct intel_display *display);
> +unsigned int intel_mem_freq(struct intel_display *display);
> +const struct dram_info *intel_dram_info(struct intel_display *display);
>  const char *intel_dram_type_str(enum intel_dram_type type);
>  
>  #endif /* __INTEL_DRAM_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index a33e0cec8cba..7964cfffdaae 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
>  	if (display->platform.kabylake ||
>  	    display->platform.coffeelake ||
>  	    display->platform.cometlake) {
> -		const struct dram_info *dram_info = intel_dram_info(display->drm);
> +		const struct dram_info *dram_info = intel_dram_info(display);
>  
>  		return dram_info->symmetric_memory;
>  	}
> @@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
>  
>  static bool need_16gb_dimm_wa(struct intel_display *display)
>  {
> -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> +	const struct dram_info *dram_info = intel_dram_info(display);
>  
>  	return (display->platform.skylake || display->platform.kabylake ||
>  		display->platform.coffeelake || display->platform.cometlake ||
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index d1f573f1b6cc..2369e2b55096 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
>  	 * Fill the dram structure to get the system dram info. This will be
>  	 * used for memory latency calculation.
>  	 */
> -	ret = intel_dram_detect(dev_priv);
> +	ret = intel_dram_detect(display);
>  	if (ret)
>  		goto err_opregion;
>  
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 9b1d21e03df0..793115077615 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
>  	 * Fill the dram structure to get the system dram info. This will be
>  	 * used for memory latency calculation.
>  	 */
> -	err = intel_dram_detect(xe);
> +	err = intel_dram_detect(display);
>  	if (err)
>  		goto err_opregion;

-- 
Jani Nikula, Intel

Re: [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display

[Ville Syrjälä]

On Thu, Nov 20, 2025 at 10:31:06AM +0200, Jani Nikula wrote:
> On Wed, 19 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> > Convert everything except uncore access to struct intel_display.
> >
> > While at it, convert logging to drm_dbg_kms().
> >
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/i9xx_wm.c        |   2 +-
> >  drivers/gpu/drm/i915/display/intel_bw.c       |   2 +-
> >  drivers/gpu/drm/i915/display/intel_cdclk.c    |   4 +-
> >  .../drm/i915/display/intel_display_power.c    |   2 +-
> >  drivers/gpu/drm/i915/display/intel_dram.c     | 205 +++++++++---------
> >  drivers/gpu/drm/i915/display/intel_dram.h     |  11 +-
> >  drivers/gpu/drm/i915/display/skl_watermark.c  |   4 +-
> >  drivers/gpu/drm/i915/i915_driver.c            |   2 +-
> >  drivers/gpu/drm/xe/display/xe_display.c       |   2 +-
> >  9 files changed, 120 insertions(+), 114 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > index 27e2d73bc505..167277cd8877 100644
> > --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> > +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > @@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
> >  
> >  static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
> >  {
> > -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> > +	const struct dram_info *dram_info = intel_dram_info(display);
> >  	bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
> >  	int i;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> > index 957c90e62569..d27835ed49c2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
> >  
> >  void intel_bw_init_hw(struct intel_display *display)
> >  {
> > -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> > +	const struct dram_info *dram_info = intel_dram_info(display);
> >  
> >  	if (!HAS_DISPLAY(display))
> >  		return;
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 531819391c8c..5c90e53b4e46 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
> >  
> >  static int i9xx_hrawclk(struct intel_display *display)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(display->drm);
> > -
> >  	/* hrawclock is 1/4 the FSB frequency */
> > -	return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
> > +	return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
> >  }
> >  
> >  /**
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 9c5f0277d8c2..08db9bbbfcb1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
> >  
> >  static void tgl_bw_buddy_init(struct intel_display *display)
> >  {
> > -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> > +	const struct dram_info *dram_info = intel_dram_info(display);
> >  	const struct buddy_page_mask *table;
> >  	unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
> >  	int config, i;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> > index 7142772f2a6e..3dfcc7938740 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dram.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> > @@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
> >  
> >  #undef DRAM_TYPE_STR
> >  
> > -static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
> > +static enum intel_dram_type pnv_dram_type(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> > +
> >  	return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
> >  		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
> >  }
> >  
> > -static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int pnv_mem_freq(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *dev_priv = to_i915(display->drm);
> >  	u32 tmp;
> >  
> >  	tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
> > @@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> >  	return 0;
> >  }
> >  
> > -static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int ilk_mem_freq(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *dev_priv = to_i915(display->drm);
> >  	u16 ddrpll;
> >  
> >  	ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
> > @@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> >  	case 0x18:
> >  		return 1600000;
> >  	default:
> > -		drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
> > -			ddrpll & 0xff);
> > +		drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
> > +			    ddrpll & 0xff);
> >  		return 0;
> >  	}
> >  }
> >  
> > -static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> > +static unsigned int chv_mem_freq(struct intel_display *display)
> >  {
> >  	u32 val;
> >  
> > -	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> > -	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> > -	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> > +	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
> > +	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> > +	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
> >  
> >  	switch ((val >> 2) & 0x7) {
> >  	case 3:
> > @@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> >  	}
> >  }
> >  
> > -static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> > +static unsigned int vlv_mem_freq(struct intel_display *display)
> >  {
> >  	u32 val;
> >  
> > -	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> > -	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> > -	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> > +	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> > +	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> > +	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> >  
> >  	switch ((val >> 6) & 3) {
> >  	case 0:
> > @@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> >  	return 0;
> >  }
> >  
> > -unsigned int intel_mem_freq(struct drm_i915_private *i915)
> > +unsigned int intel_mem_freq(struct intel_display *display)
> >  {
> > -	if (IS_PINEVIEW(i915))
> > -		return pnv_mem_freq(i915);
> > -	else if (GRAPHICS_VER(i915) == 5)
> > -		return ilk_mem_freq(i915);
> > -	else if (IS_CHERRYVIEW(i915))
> > -		return chv_mem_freq(i915);
> > -	else if (IS_VALLEYVIEW(i915))
> > -		return vlv_mem_freq(i915);
> > +	if (display->platform.pineview)
> > +		return pnv_mem_freq(display);
> > +	else if (DISPLAY_VER(display) == 5)
> > +		return ilk_mem_freq(display);
> > +	else if (display->platform.cherryview)
> > +		return chv_mem_freq(display);
> > +	else if (display->platform.valleyview)
> > +		return vlv_mem_freq(display);
> >  	else
> >  		return 0;
> >  }
> >  
> > -static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> > +static unsigned int i9xx_fsb_freq(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	u32 fsb;
> >  
> >  	/*
> > @@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> >  	 */
> >  	fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
> >  
> > -	if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
> > +	if (display->platform.pineview || display->platform.mobile) {
> >  		switch (fsb) {
> >  		case CLKCFG_FSB_400:
> >  			return 400000;
> > @@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> >  	}
> >  }
> >  
> > -static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int ilk_fsb_freq(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *dev_priv = to_i915(display->drm);
> >  	u16 fsb;
> >  
> >  	fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
> > @@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> >  	case 0x018:
> >  		return 6400000;
> >  	default:
> > -		drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
> > +		drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
> >  		return 0;
> >  	}
> >  }
> >  
> > -unsigned int intel_fsb_freq(struct drm_i915_private *i915)
> > +unsigned int intel_fsb_freq(struct intel_display *display)
> >  {
> > -	if (GRAPHICS_VER(i915) == 5)
> > -		return ilk_fsb_freq(i915);
> > -	else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
> > -		return i9xx_fsb_freq(i915);
> > +	if (DISPLAY_VER(display) == 5)
> > +		return ilk_fsb_freq(display);
> > +	else if (IS_DISPLAY_VER(display, 3, 4))
> > +		return i9xx_fsb_freq(display);
> >  	else
> >  		return 0;
> >  }
> >  
> > -static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> > -	dram_info->fsb_freq = intel_fsb_freq(i915);
> > +	dram_info->fsb_freq = intel_fsb_freq(display);
> >  	if (dram_info->fsb_freq)
> > -		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> > +		drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> >  
> > -	dram_info->mem_freq = intel_mem_freq(i915);
> > +	dram_info->mem_freq = intel_mem_freq(display);
> >  	if (dram_info->mem_freq)
> > -		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> > +		drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> >  
> > -	if (IS_PINEVIEW(i915))
> > -		dram_info->type = pnv_dram_type(i915);
> > +	if (display->platform.pineview)
> > +		dram_info->type = pnv_dram_type(display);
> >  
> >  	return 0;
> >  }
> > @@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
> >  }
> >  
> >  static void
> > -skl_dram_print_dimm_info(struct drm_i915_private *i915,
> > +skl_dram_print_dimm_info(struct intel_display *display,
> >  			 struct dram_dimm_info *dimm,
> >  			 int channel, char dimm_name)
> >  {
> > -	drm_dbg_kms(&i915->drm,
> > +	drm_dbg_kms(display->drm,
> >  		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
> >  		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
> >  		    str_yes_no(skl_is_16gb_dimm(dimm)));
> >  }
> >  
> >  static void
> > -skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> > +skl_dram_get_dimm_l_info(struct intel_display *display,
> >  			 struct dram_dimm_info *dimm,
> >  			 int channel, u32 val)
> >  {
> > -	if (GRAPHICS_VER(i915) >= 11) {
> > +	if (DISPLAY_VER(display) >= 11) {
> >  		dimm->size = icl_get_dimm_l_size(val);
> >  		dimm->width = icl_get_dimm_l_width(val);
> >  		dimm->ranks = icl_get_dimm_l_ranks(val);
> > @@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> >  		dimm->ranks = skl_get_dimm_l_ranks(val);
> >  	}
> >  
> > -	skl_dram_print_dimm_info(i915, dimm, channel, 'L');
> > +	skl_dram_print_dimm_info(display, dimm, channel, 'L');
> >  }
> >  
> >  static void
> > -skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> > +skl_dram_get_dimm_s_info(struct intel_display *display,
> >  			 struct dram_dimm_info *dimm,
> >  			 int channel, u32 val)
> >  {
> > -	if (GRAPHICS_VER(i915) >= 11) {
> > +	if (DISPLAY_VER(display) >= 11) {
> >  		dimm->size = icl_get_dimm_s_size(val);
> >  		dimm->width = icl_get_dimm_s_width(val);
> >  		dimm->ranks = icl_get_dimm_s_ranks(val);
> > @@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> >  		dimm->ranks = skl_get_dimm_s_ranks(val);
> >  	}
> >  
> > -	skl_dram_print_dimm_info(i915, dimm, channel, 'S');
> > +	skl_dram_print_dimm_info(display, dimm, channel, 'S');
> >  }
> >  
> >  static int
> > -skl_dram_get_channel_info(struct drm_i915_private *i915,
> > +skl_dram_get_channel_info(struct intel_display *display,
> >  			  struct dram_channel_info *ch,
> >  			  int channel, u32 val)
> >  {
> > -	skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
> > -	skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
> > +	skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
> > +	skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
> >  
> >  	if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
> > -		drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
> > +		drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
> >  		return -EINVAL;
> >  	}
> >  
> > @@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
> >  	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
> >  		skl_is_16gb_dimm(&ch->dimm_s);
> >  
> > -	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> > +	drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> >  		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
> >  
> >  	return 0;
> > @@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
> >  }
> >  
> >  static int
> > -skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	struct dram_channel_info ch0 = {}, ch1 = {};
> >  	u32 val;
> >  	int ret;
> > @@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
> >  
> >  	val = intel_uncore_read(&i915->uncore,
> >  				SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> > -	ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
> > +	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
> >  	if (ret == 0)
> >  		dram_info->num_channels++;
> >  
> >  	val = intel_uncore_read(&i915->uncore,
> >  				SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> > -	ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
> > +	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
> >  	if (ret == 0)
> >  		dram_info->num_channels++;
> >  
> >  	if (dram_info->num_channels == 0) {
> > -		drm_info(&i915->drm, "Number of memory channels is zero\n");
> > +		drm_info(display->drm, "Number of memory channels is zero\n");
> >  		return -EINVAL;
> >  	}
> >  
> >  	if (ch0.ranks == 0 && ch1.ranks == 0) {
> > -		drm_info(&i915->drm, "couldn't get memory rank information\n");
> > +		drm_info(display->drm, "couldn't get memory rank information\n");
> >  		return -EINVAL;
> >  	}
> >  
> > @@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
> >  
> >  	dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
> >  
> > -	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
> > +	drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
> >  		    str_yes_no(dram_info->symmetric_memory));
> >  
> > -	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
> > +	drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
> >  		    str_yes_no(dram_info->has_16gb_dimms));
> >  
> >  	return 0;
> >  }
> >  
> >  static enum intel_dram_type
> > -skl_get_dram_type(struct drm_i915_private *i915)
> > +skl_get_dram_type(struct intel_display *display)
> >  {
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	u32 val;
> >  
> >  	val = intel_uncore_read(&i915->uncore,
> > @@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
> >  }
> >  
> >  static int
> > -skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> >  	int ret;
> >  
> > -	dram_info->type = skl_get_dram_type(i915);
> > +	dram_info->type = skl_get_dram_type(display);
> >  
> > -	ret = skl_dram_get_channels_info(i915, dram_info);
> > +	ret = skl_dram_get_channels_info(display, dram_info);
> >  	if (ret)
> >  		return ret;
> >  
> > @@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
> >  	dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
> >  }
> >  
> > -static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	u32 val;
> >  	u8 valid_ranks = 0;
> >  	int i;
> > @@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> >  		bxt_get_dimm_info(&dimm, val);
> >  		type = bxt_get_dimm_type(val);
> >  
> > -		drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
> > +		drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
> >  			    dram_info->type != INTEL_DRAM_UNKNOWN &&
> >  			    dram_info->type != type);
> >  
> > -		drm_dbg_kms(&i915->drm,
> > +		drm_dbg_kms(display->drm,
> >  			    "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
> >  			    i - BXT_D_CR_DRP0_DUNIT_START,
> >  			    dimm.size, dimm.width, dimm.ranks);
> > @@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> >  	}
> >  
> >  	if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
> > -		drm_info(&i915->drm, "couldn't get memory information\n");
> > +		drm_info(display->drm, "couldn't get memory information\n");
> >  		return -EINVAL;
> >  	}
> >  
> >  	return 0;
> >  }
> >  
> > -static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> > +static int icl_pcode_read_mem_global_info(struct intel_display *display,
> >  					  struct dram_info *dram_info)
> >  {
> >  	u32 val = 0;
> >  	int ret;
> >  
> > -	ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> > +	ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> >  			       ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
> >  	if (ret)
> >  		return ret;
> >  
> > -	if (GRAPHICS_VER(dev_priv) == 12) {
> > +	if (DISPLAY_VER(display) == 12) {
> 
> CI tells me this goes south on e.g. ADL-P (or TWL) which has graphics
> version 12 but display version 13.
> 
> What to do.

You can just check for >=12 here.

> 
> 
> BR,
> Jani.
> 
> >  		switch (val & 0xf) {
> >  		case 0:
> >  			dram_info->type = INTEL_DRAM_DDR4;
> > @@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> >  	return 0;
> >  }
> >  
> > -static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> >  	int ret;
> >  
> > -	ret = skl_dram_get_channels_info(i915, dram_info);
> > +	ret = skl_dram_get_channels_info(display, dram_info);
> >  	if (ret)
> >  		return ret;
> >  
> > -	return icl_pcode_read_mem_global_info(i915, dram_info);
> > +	return icl_pcode_read_mem_global_info(display, dram_info);
> >  }
> >  
> > -static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> > -	return icl_pcode_read_mem_global_info(i915, dram_info);
> > +	return icl_pcode_read_mem_global_info(display, dram_info);
> >  }
> >  
> > -static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> >  {
> > -	struct intel_display *display = i915->display;
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
> >  
> >  	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
> > @@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> >  		dram_info->type = INTEL_DRAM_LPDDR3;
> >  		break;
> >  	case 8:
> > -		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> > +		drm_WARN_ON(display->drm, !display->platform.dgfx);
> >  		dram_info->type = INTEL_DRAM_GDDR;
> >  		break;
> >  	case 9:
> > -		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> > +		drm_WARN_ON(display->drm, !display->platform.dgfx);
> >  		dram_info->type = INTEL_DRAM_GDDR_ECC;
> >  		break;
> >  	default:
> > @@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> >  	return 0;
> >  }
> >  
> > -int intel_dram_detect(struct drm_i915_private *i915)
> > +int intel_dram_detect(struct intel_display *display)
> >  {
> > -	struct intel_display *display = i915->display;
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  	struct dram_info *dram_info;
> >  	int ret;
> >  
> > -	if (IS_DG2(i915) || !intel_display_device_present(display))
> > +	if (display->platform.dg2 || !HAS_DISPLAY(display))
> >  		return 0;
> >  
> > -	dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> > +	dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
> >  	if (!dram_info)
> >  		return -ENOMEM;
> >  
> >  	i915->dram_info = dram_info;
> >  
> >  	if (DISPLAY_VER(display) >= 14)
> > -		ret = xelpdp_get_dram_info(i915, dram_info);
> > -	else if (GRAPHICS_VER(i915) >= 12)
> > -		ret = gen12_get_dram_info(i915, dram_info);
> > -	else if (GRAPHICS_VER(i915) >= 11)
> > -		ret = gen11_get_dram_info(i915, dram_info);
> > -	else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
> > -		ret = bxt_get_dram_info(i915, dram_info);
> > -	else if (GRAPHICS_VER(i915) >= 9)
> > -		ret = skl_get_dram_info(i915, dram_info);
> > +		ret = xelpdp_get_dram_info(display, dram_info);
> > +	else if (DISPLAY_VER(display) >= 12)
> > +		ret = gen12_get_dram_info(display, dram_info);
> > +	else if (DISPLAY_VER(display) >= 11)
> > +		ret = gen11_get_dram_info(display, dram_info);
> > +	else if (display->platform.broxton || display->platform.geminilake)
> > +		ret = bxt_get_dram_info(display, dram_info);
> > +	else if (DISPLAY_VER(display) >= 9)
> > +		ret = skl_get_dram_info(display, dram_info);
> >  	else
> > -		ret = i915_get_dram_info(i915, dram_info);
> > +		ret = i915_get_dram_info(display, dram_info);
> >  
> > -	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
> > +	drm_dbg_kms(display->drm, "DRAM type: %s\n",
> >  		    intel_dram_type_str(dram_info->type));
> >  
> > -	drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
> > +	drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
> >  
> > -	drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> > -	drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> > +	drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> > +	drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> >  
> >  	/* TODO: Do we want to abort probe on dram detection failures? */
> >  	if (ret)
> > @@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
> >   * checks, and prefer not dereferencing on platforms that shouldn't look at dram
> >   * info, to catch accidental and incorrect dram info checks.
> >   */
> > -const struct dram_info *intel_dram_info(struct drm_device *drm)
> > +const struct dram_info *intel_dram_info(struct intel_display *display)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(drm);
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> >  
> >  	return i915->dram_info;
> >  }
> > diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
> > index 58aaf2f91afe..5800b7b4e614 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dram.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dram.h
> > @@ -8,8 +8,7 @@
> >  
> >  #include <linux/types.h>
> >  
> > -struct drm_i915_private;
> > -struct drm_device;
> > +struct intel_display;
> >  
> >  struct dram_info {
> >  	enum intel_dram_type {
> > @@ -35,10 +34,10 @@ struct dram_info {
> >  	bool has_16gb_dimms;
> >  };
> >  
> > -int intel_dram_detect(struct drm_i915_private *i915);
> > -unsigned int intel_fsb_freq(struct drm_i915_private *i915);
> > -unsigned int intel_mem_freq(struct drm_i915_private *i915);
> > -const struct dram_info *intel_dram_info(struct drm_device *drm);
> > +int intel_dram_detect(struct intel_display *display);
> > +unsigned int intel_fsb_freq(struct intel_display *display);
> > +unsigned int intel_mem_freq(struct intel_display *display);
> > +const struct dram_info *intel_dram_info(struct intel_display *display);
> >  const char *intel_dram_type_str(enum intel_dram_type type);
> >  
> >  #endif /* __INTEL_DRAM_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index a33e0cec8cba..7964cfffdaae 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
> >  	if (display->platform.kabylake ||
> >  	    display->platform.coffeelake ||
> >  	    display->platform.cometlake) {
> > -		const struct dram_info *dram_info = intel_dram_info(display->drm);
> > +		const struct dram_info *dram_info = intel_dram_info(display);
> >  
> >  		return dram_info->symmetric_memory;
> >  	}
> > @@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
> >  
> >  static bool need_16gb_dimm_wa(struct intel_display *display)
> >  {
> > -	const struct dram_info *dram_info = intel_dram_info(display->drm);
> > +	const struct dram_info *dram_info = intel_dram_info(display);
> >  
> >  	return (display->platform.skylake || display->platform.kabylake ||
> >  		display->platform.coffeelake || display->platform.cometlake ||
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> > index d1f573f1b6cc..2369e2b55096 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
> >  	 * Fill the dram structure to get the system dram info. This will be
> >  	 * used for memory latency calculation.
> >  	 */
> > -	ret = intel_dram_detect(dev_priv);
> > +	ret = intel_dram_detect(display);
> >  	if (ret)
> >  		goto err_opregion;
> >  
> > diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> > index 9b1d21e03df0..793115077615 100644
> > --- a/drivers/gpu/drm/xe/display/xe_display.c
> > +++ b/drivers/gpu/drm/xe/display/xe_display.c
> > @@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
> >  	 * Fill the dram structure to get the system dram info. This will be
> >  	 * used for memory latency calculation.
> >  	 */
> > -	err = intel_dram_detect(xe);
> > +	err = intel_dram_detect(display);
> >  	if (err)
> >  		goto err_opregion;
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

[PATCH v3] drm/i915/dram: convert to struct intel_display

[Jani Nikula]

Convert everything except uncore access to struct
intel_display. Converting the graphics version checks to display version
checks needs a tweak for display version 13, which have graphics version
12.

While at it, convert logging to drm_dbg_kms().

v2: Handle display version 13

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c        |   2 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |   4 +-
 .../drm/i915/display/intel_display_power.c    |   2 +-
 drivers/gpu/drm/i915/display/intel_dram.c     | 205 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dram.h     |  11 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |   4 +-
 drivers/gpu/drm/i915/i915_driver.c            |   2 +-
 drivers/gpu/drm/xe/display/xe_display.c       |   2 +-
 9 files changed, 120 insertions(+), 114 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 27e2d73bc505..167277cd8877 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
 
 static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 	bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
 	int i;
 
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 957c90e62569..d27835ed49c2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
 
 void intel_bw_init_hw(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 
 	if (!HAS_DISPLAY(display))
 		return;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 531819391c8c..5c90e53b4e46 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
 
 static int i9xx_hrawclk(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
 	/* hrawclock is 1/4 the FSB frequency */
-	return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
+	return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 9c5f0277d8c2..08db9bbbfcb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
 
 static void tgl_bw_buddy_init(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 	const struct buddy_page_mask *table;
 	unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
 	int config, i;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 7142772f2a6e..b4fa1fe8709c 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
 
 #undef DRAM_TYPE_STR
 
-static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
 	return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
 		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
 }
 
-static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int pnv_mem_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 tmp;
 
 	tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
@@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
 	return 0;
 }
 
-static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_mem_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u16 ddrpll;
 
 	ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
@@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
 	case 0x18:
 		return 1600000;
 	default:
-		drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
-			ddrpll & 0xff);
+		drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
+			    ddrpll & 0xff);
 		return 0;
 	}
 }
 
-static unsigned int chv_mem_freq(struct drm_i915_private *i915)
+static unsigned int chv_mem_freq(struct intel_display *display)
 {
 	u32 val;
 
-	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
-	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
-	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
+	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
+	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
+	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
 
 	switch ((val >> 2) & 0x7) {
 	case 3:
@@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
 	}
 }
 
-static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
+static unsigned int vlv_mem_freq(struct intel_display *display)
 {
 	u32 val;
 
-	vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
-	val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
-	vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
+	vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
+	val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
+	vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
 
 	switch ((val >> 6) & 3) {
 	case 0:
@@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
 	return 0;
 }
 
-unsigned int intel_mem_freq(struct drm_i915_private *i915)
+unsigned int intel_mem_freq(struct intel_display *display)
 {
-	if (IS_PINEVIEW(i915))
-		return pnv_mem_freq(i915);
-	else if (GRAPHICS_VER(i915) == 5)
-		return ilk_mem_freq(i915);
-	else if (IS_CHERRYVIEW(i915))
-		return chv_mem_freq(i915);
-	else if (IS_VALLEYVIEW(i915))
-		return vlv_mem_freq(i915);
+	if (display->platform.pineview)
+		return pnv_mem_freq(display);
+	else if (DISPLAY_VER(display) == 5)
+		return ilk_mem_freq(display);
+	else if (display->platform.cherryview)
+		return chv_mem_freq(display);
+	else if (display->platform.valleyview)
+		return vlv_mem_freq(display);
 	else
 		return 0;
 }
 
-static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 fsb;
 
 	/*
@@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
 	 */
 	fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
 
-	if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+	if (display->platform.pineview || display->platform.mobile) {
 		switch (fsb) {
 		case CLKCFG_FSB_400:
 			return 400000;
@@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
 	}
 }
 
-static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_fsb_freq(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u16 fsb;
 
 	fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
@@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
 	case 0x018:
 		return 6400000;
 	default:
-		drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
+		drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
 		return 0;
 	}
 }
 
-unsigned int intel_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct intel_display *display)
 {
-	if (GRAPHICS_VER(i915) == 5)
-		return ilk_fsb_freq(i915);
-	else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
-		return i9xx_fsb_freq(i915);
+	if (DISPLAY_VER(display) == 5)
+		return ilk_fsb_freq(display);
+	else if (IS_DISPLAY_VER(display, 3, 4))
+		return i9xx_fsb_freq(display);
 	else
 		return 0;
 }
 
-static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	dram_info->fsb_freq = intel_fsb_freq(i915);
+	dram_info->fsb_freq = intel_fsb_freq(display);
 	if (dram_info->fsb_freq)
-		drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
+		drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
 
-	dram_info->mem_freq = intel_mem_freq(i915);
+	dram_info->mem_freq = intel_mem_freq(display);
 	if (dram_info->mem_freq)
-		drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
+		drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
 
-	if (IS_PINEVIEW(i915))
-		dram_info->type = pnv_dram_type(i915);
+	if (display->platform.pineview)
+		dram_info->type = pnv_dram_type(display);
 
 	return 0;
 }
@@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
 }
 
 static void
-skl_dram_print_dimm_info(struct drm_i915_private *i915,
+skl_dram_print_dimm_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, char dimm_name)
 {
-	drm_dbg_kms(&i915->drm,
+	drm_dbg_kms(display->drm,
 		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
 		    str_yes_no(skl_is_16gb_dimm(dimm)));
 }
 
 static void
-skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_l_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, u32 val)
 {
-	if (GRAPHICS_VER(i915) >= 11) {
+	if (DISPLAY_VER(display) >= 11) {
 		dimm->size = icl_get_dimm_l_size(val);
 		dimm->width = icl_get_dimm_l_width(val);
 		dimm->ranks = icl_get_dimm_l_ranks(val);
@@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
 		dimm->ranks = skl_get_dimm_l_ranks(val);
 	}
 
-	skl_dram_print_dimm_info(i915, dimm, channel, 'L');
+	skl_dram_print_dimm_info(display, dimm, channel, 'L');
 }
 
 static void
-skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_s_info(struct intel_display *display,
 			 struct dram_dimm_info *dimm,
 			 int channel, u32 val)
 {
-	if (GRAPHICS_VER(i915) >= 11) {
+	if (DISPLAY_VER(display) >= 11) {
 		dimm->size = icl_get_dimm_s_size(val);
 		dimm->width = icl_get_dimm_s_width(val);
 		dimm->ranks = icl_get_dimm_s_ranks(val);
@@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
 		dimm->ranks = skl_get_dimm_s_ranks(val);
 	}
 
-	skl_dram_print_dimm_info(i915, dimm, channel, 'S');
+	skl_dram_print_dimm_info(display, dimm, channel, 'S');
 }
 
 static int
-skl_dram_get_channel_info(struct drm_i915_private *i915,
+skl_dram_get_channel_info(struct intel_display *display,
 			  struct dram_channel_info *ch,
 			  int channel, u32 val)
 {
-	skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
-	skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
+	skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
+	skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
 
 	if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
-		drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
+		drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
 		return -EINVAL;
 	}
 
@@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
 	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
 		skl_is_16gb_dimm(&ch->dimm_s);
 
-	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
+	drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
 
 	return 0;
@@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
 }
 
 static int
-skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct dram_channel_info ch0 = {}, ch1 = {};
 	u32 val;
 	int ret;
@@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 
 	val = intel_uncore_read(&i915->uncore,
 				SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
-	ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
+	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
 	if (ret == 0)
 		dram_info->num_channels++;
 
 	val = intel_uncore_read(&i915->uncore,
 				SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
-	ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
+	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
 	if (ret == 0)
 		dram_info->num_channels++;
 
 	if (dram_info->num_channels == 0) {
-		drm_info(&i915->drm, "Number of memory channels is zero\n");
+		drm_info(display->drm, "Number of memory channels is zero\n");
 		return -EINVAL;
 	}
 
 	if (ch0.ranks == 0 && ch1.ranks == 0) {
-		drm_info(&i915->drm, "couldn't get memory rank information\n");
+		drm_info(display->drm, "couldn't get memory rank information\n");
 		return -EINVAL;
 	}
 
@@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 
 	dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
 
-	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
+	drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
 		    str_yes_no(dram_info->symmetric_memory));
 
-	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
+	drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
 		    str_yes_no(dram_info->has_16gb_dimms));
 
 	return 0;
 }
 
 static enum intel_dram_type
-skl_get_dram_type(struct drm_i915_private *i915)
+skl_get_dram_type(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val;
 
 	val = intel_uncore_read(&i915->uncore,
@@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
 }
 
 static int
-skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
 	int ret;
 
-	dram_info->type = skl_get_dram_type(i915);
+	dram_info->type = skl_get_dram_type(display);
 
-	ret = skl_dram_get_channels_info(i915, dram_info);
+	ret = skl_dram_get_channels_info(display, dram_info);
 	if (ret)
 		return ret;
 
@@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
 	dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
 }
 
-static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val;
 	u8 valid_ranks = 0;
 	int i;
@@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
 		bxt_get_dimm_info(&dimm, val);
 		type = bxt_get_dimm_type(val);
 
-		drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
+		drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
 			    dram_info->type != INTEL_DRAM_UNKNOWN &&
 			    dram_info->type != type);
 
-		drm_dbg_kms(&i915->drm,
+		drm_dbg_kms(display->drm,
 			    "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
 			    i - BXT_D_CR_DRP0_DUNIT_START,
 			    dimm.size, dimm.width, dimm.ranks);
@@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
 	}
 
 	if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
-		drm_info(&i915->drm, "couldn't get memory information\n");
+		drm_info(display->drm, "couldn't get memory information\n");
 		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
+static int icl_pcode_read_mem_global_info(struct intel_display *display,
 					  struct dram_info *dram_info)
 {
 	u32 val = 0;
 	int ret;
 
-	ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+	ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
 			       ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
 	if (ret)
 		return ret;
 
-	if (GRAPHICS_VER(dev_priv) == 12) {
+	if (DISPLAY_VER(display) >= 12) {
 		switch (val & 0xf) {
 		case 0:
 			dram_info->type = INTEL_DRAM_DDR4;
@@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
 	return 0;
 }
 
-static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
 	int ret;
 
-	ret = skl_dram_get_channels_info(i915, dram_info);
+	ret = skl_dram_get_channels_info(display, dram_info);
 	if (ret)
 		return ret;
 
-	return icl_pcode_read_mem_global_info(i915, dram_info);
+	return icl_pcode_read_mem_global_info(display, dram_info);
 }
 
-static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	return icl_pcode_read_mem_global_info(i915, dram_info);
+	return icl_pcode_read_mem_global_info(display, dram_info);
 }
 
-static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	struct intel_display *display = i915->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
 
 	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
@@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
 		dram_info->type = INTEL_DRAM_LPDDR3;
 		break;
 	case 8:
-		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+		drm_WARN_ON(display->drm, !display->platform.dgfx);
 		dram_info->type = INTEL_DRAM_GDDR;
 		break;
 	case 9:
-		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+		drm_WARN_ON(display->drm, !display->platform.dgfx);
 		dram_info->type = INTEL_DRAM_GDDR_ECC;
 		break;
 	default:
@@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
 	return 0;
 }
 
-int intel_dram_detect(struct drm_i915_private *i915)
+int intel_dram_detect(struct intel_display *display)
 {
-	struct intel_display *display = i915->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct dram_info *dram_info;
 	int ret;
 
-	if (IS_DG2(i915) || !intel_display_device_present(display))
+	if (display->platform.dg2 || !HAS_DISPLAY(display))
 		return 0;
 
-	dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+	dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
 	if (!dram_info)
 		return -ENOMEM;
 
 	i915->dram_info = dram_info;
 
 	if (DISPLAY_VER(display) >= 14)
-		ret = xelpdp_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 12)
-		ret = gen12_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 11)
-		ret = gen11_get_dram_info(i915, dram_info);
-	else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
-		ret = bxt_get_dram_info(i915, dram_info);
-	else if (GRAPHICS_VER(i915) >= 9)
-		ret = skl_get_dram_info(i915, dram_info);
+		ret = xelpdp_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 12)
+		ret = gen12_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 11)
+		ret = gen11_get_dram_info(display, dram_info);
+	else if (display->platform.broxton || display->platform.geminilake)
+		ret = bxt_get_dram_info(display, dram_info);
+	else if (DISPLAY_VER(display) >= 9)
+		ret = skl_get_dram_info(display, dram_info);
 	else
-		ret = i915_get_dram_info(i915, dram_info);
+		ret = i915_get_dram_info(display, dram_info);
 
-	drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
+	drm_dbg_kms(display->drm, "DRAM type: %s\n",
 		    intel_dram_type_str(dram_info->type));
 
-	drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
+	drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
 
-	drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
-	drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
+	drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
+	drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
 
 	/* TODO: Do we want to abort probe on dram detection failures? */
 	if (ret)
@@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
  * checks, and prefer not dereferencing on platforms that shouldn't look at dram
  * info, to catch accidental and incorrect dram info checks.
  */
-const struct dram_info *intel_dram_info(struct drm_device *drm)
+const struct dram_info *intel_dram_info(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(drm);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	return i915->dram_info;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
index 58aaf2f91afe..5800b7b4e614 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.h
+++ b/drivers/gpu/drm/i915/display/intel_dram.h
@@ -8,8 +8,7 @@
 
 #include <linux/types.h>
 
-struct drm_i915_private;
-struct drm_device;
+struct intel_display;
 
 struct dram_info {
 	enum intel_dram_type {
@@ -35,10 +34,10 @@ struct dram_info {
 	bool has_16gb_dimms;
 };
 
-int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int intel_fsb_freq(struct drm_i915_private *i915);
-unsigned int intel_mem_freq(struct drm_i915_private *i915);
-const struct dram_info *intel_dram_info(struct drm_device *drm);
+int intel_dram_detect(struct intel_display *display);
+unsigned int intel_fsb_freq(struct intel_display *display);
+unsigned int intel_mem_freq(struct intel_display *display);
+const struct dram_info *intel_dram_info(struct intel_display *display);
 const char *intel_dram_type_str(enum intel_dram_type type);
 
 #endif /* __INTEL_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a33e0cec8cba..7964cfffdaae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
 	if (display->platform.kabylake ||
 	    display->platform.coffeelake ||
 	    display->platform.cometlake) {
-		const struct dram_info *dram_info = intel_dram_info(display->drm);
+		const struct dram_info *dram_info = intel_dram_info(display);
 
 		return dram_info->symmetric_memory;
 	}
@@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
 
 static bool need_16gb_dimm_wa(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
+	const struct dram_info *dram_info = intel_dram_info(display);
 
 	return (display->platform.skylake || display->platform.kabylake ||
 		display->platform.coffeelake || display->platform.cometlake ||
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index d1f573f1b6cc..2369e2b55096 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 	 * Fill the dram structure to get the system dram info. This will be
 	 * used for memory latency calculation.
 	 */
-	ret = intel_dram_detect(dev_priv);
+	ret = intel_dram_detect(display);
 	if (ret)
 		goto err_opregion;
 
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 9b1d21e03df0..793115077615 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
 	 * Fill the dram structure to get the system dram info. This will be
 	 * used for memory latency calculation.
 	 */
-	err = intel_dram_detect(xe);
+	err = intel_dram_detect(display);
 	if (err)
 		goto err_opregion;
 
-- 
2.47.3

Re: [PATCH v2 00/13] drm/i915: dissolve soc/

[Ville Syrjälä]

On Wed, Nov 19, 2025 at 08:52:39PM +0200, Jani Nikula wrote:
> Split soc/ to i915 and display specific parts, and relocate code
> accordingly.
> 
> In v2, cover all of soc/.
> 
> BR,
> Jani.
> 
> Jani Nikula (13):
>   drm/i915/edram: extract i915_edram.[ch] for edram detection
>   drm/i915: split out i915_freq.[ch]
>   drm/i915: move intel_dram.[ch] from soc/ to display/
>   drm/xe: remove MISSING_CASE() from compat i915_utils.h
>   drm/i915/dram: convert to struct intel_display
>   drm/i915: move dram_info to struct intel_display
>   drm/i915: move intel_rom.[ch] from soc/ to display/
>   drm/xe: remove remaining platform checks from compat i915_drv.h
>   drm/i915/gmch: split out i915_gmch.[ch] from soc
>   drm/i915/gmch: switch to use pci_bus_{read,write}_config_word()
>   drm/i915/gmch: convert intel_gmch.c to struct intel_display
>   drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
>   drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915

Looks all right to me. Series is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
>  drivers/gpu/drm/i915/Makefile                 |  11 +-
>  drivers/gpu/drm/i915/display/i9xx_wm.c        |   5 +-
>  drivers/gpu/drm/i915/display/intel_bios.c     |   3 +-
>  drivers/gpu/drm/i915/display/intel_bw.c       |   5 +-
>  drivers/gpu/drm/i915/display/intel_cdclk.c    |   7 +-
>  .../gpu/drm/i915/display/intel_display_core.h |   4 +
>  .../drm/i915/display/intel_display_power.c    |   5 +-
>  .../drm/i915/{soc => display}/intel_dram.c    | 249 ++++++++----------
>  .../drm/i915/{soc => display}/intel_dram.h    |  12 +-
>  .../gpu/drm/i915/{soc => display}/intel_rom.c |   0
>  .../gpu/drm/i915/{soc => display}/intel_rom.h |   0
>  drivers/gpu/drm/i915/display/intel_vga.c      |  44 +++-
>  drivers/gpu/drm/i915/display/skl_watermark.c  |   6 +-
>  .../gpu/drm/i915/gt/intel_gt_clock_utils.c    |   4 +-
>  drivers/gpu/drm/i915/gt/intel_rps.c           |   6 +-
>  drivers/gpu/drm/i915/i915_driver.c            |  18 +-
>  drivers/gpu/drm/i915/i915_drv.h               |   3 -
>  drivers/gpu/drm/i915/i915_edram.c             |  44 ++++
>  drivers/gpu/drm/i915/i915_edram.h             |  11 +
>  drivers/gpu/drm/i915/i915_freq.c              | 111 ++++++++
>  drivers/gpu/drm/i915/i915_freq.h              |  13 +
>  .../i915/{soc/intel_gmch.c => i915_gmch.c}    |  61 +----
>  drivers/gpu/drm/i915/i915_gmch.h              |  13 +
>  drivers/gpu/drm/i915/soc/intel_gmch.h         |  20 --
>  drivers/gpu/drm/xe/Makefile                   |  13 +-
>  .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  15 --
>  .../drm/xe/compat-i915-headers/i915_utils.h   |   6 -
>  .../xe/compat-i915-headers/soc/intel_dram.h   |   6 -
>  .../xe/compat-i915-headers/soc/intel_gmch.h   |   6 -
>  .../xe/compat-i915-headers/soc/intel_rom.h    |   6 -
>  drivers/gpu/drm/xe/display/xe_display.c       |   4 +-
>  drivers/gpu/drm/xe/display/xe_display_misc.c  |  16 --
>  drivers/gpu/drm/xe/xe_device_types.h          |   8 -
>  33 files changed, 394 insertions(+), 341 deletions(-)
>  rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (70%)
>  rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (68%)
>  rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
>  rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
>  create mode 100644 drivers/gpu/drm/i915/i915_edram.c
>  create mode 100644 drivers/gpu/drm/i915/i915_edram.h
>  create mode 100644 drivers/gpu/drm/i915/i915_freq.c
>  create mode 100644 drivers/gpu/drm/i915/i915_freq.h
>  rename drivers/gpu/drm/i915/{soc/intel_gmch.c => i915_gmch.c} (68%)
>  create mode 100644 drivers/gpu/drm/i915/i915_gmch.h
>  delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.h
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
>  delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c
> 
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

✓ i915.CI.BAT: success for drm/i915: dissolve soc/ (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1554 bytes --]

== Series Details ==

Series: drm/i915: dissolve soc/ (rev2)
URL   : https://patchwork.freedesktop.org/series/157793/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_17575 -> Patchwork_157793v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/index.html

Participating hosts (45 -> 43)
------------------------------

  Missing    (2): fi-glk-j4005 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_157793v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-9:         [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/bat-mtlp-9/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061


Build changes
-------------

  * Linux: CI_DRM_17575 -> Patchwork_157793v2

  CI-20190529: 20190529
  CI_DRM_17575: 13909978d70fc4ded88b778a313b68ad86ba881a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8635: 8635
  Patchwork_157793v2: 13909978d70fc4ded88b778a313b68ad86ba881a @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/index.html

[-- Attachment #2: Type: text/html, Size: 2139 bytes --]

Re: [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915

[Lucas De Marchi]

On Wed, Nov 19, 2025 at 08:52:52PM +0200, Jani Nikula wrote:
>Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
>both i915 and xe.

I hope this doesn't regress our display side on other archs. We are very
close to having display working, but this messing with VGA is likely to
break it.

See "drm/i915/display: Stop touching vga on post enable", which is
needed for xe to use a DG2/BMG with a raspberry pi (+pci/resources
branch + a few other patches).

Lucas De Marchi

✗ i915.CI.Full: failure for drm/i915: dissolve soc/ (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 115229 bytes --]

== Series Details ==

Series: drm/i915: dissolve soc/ (rev2)
URL   : https://patchwork.freedesktop.org/series/157793/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17575_full -> Patchwork_157793v2_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_157793v2_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_157793v2_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_157793v2_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][1] -> [FAIL][2] +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-tglu-6/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_pipe_stress@stress-xrgb8888-xtiled:
    - shard-mtlp:         [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-5/igt@kms_pipe_stress@stress-xrgb8888-xtiled.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-2/igt@kms_pipe_stress@stress-xrgb8888-xtiled.html

  
New tests
---------

  New tests have been introduced between CI_DRM_17575_full and Patchwork_157793v2_full:

### New IGT tests (8) ###

  * igt@kms_dirtyfb@default-dirtyfb-ioctl@a-edp-1:
    - Statuses : 1 pass(s)
    - Exec time: [1.63] s

  * igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-1:
    - Statuses : 3 pass(s)
    - Exec time: [1.24, 1.72] s

  * igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-2:
    - Statuses : 2 pass(s)
    - Exec time: [1.32, 1.57] s

  * igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [1.41] s

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-edp-1:
    - Statuses : 1 pass(s)
    - Exec time: [2.63] s

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1:
    - Statuses : 3 pass(s)
    - Exec time: [1.19, 1.36] s

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl@a-edp-1:
    - Statuses : 1 pass(s)
    - Exec time: [3.85] s

  * igt@kms_selftest@drm_dp_mst_helper@drm_test_dp_mst_calc_pbn_div:
    - Statuses : 6 pass(s)
    - Exec time: [0.09, 0.16] s

  

Known issues
------------

  Here are the changes found in Patchwork_157793v2_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_bad_reloc@negative-reloc:
    - shard-dg2:          NOTRUN -> [SKIP][5] ([i915#3281]) +3 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@gem_bad_reloc@negative-reloc.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][6] ([i915#3555] / [i915#9323])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][7] ([i915#9323])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-rkl:          NOTRUN -> [SKIP][8] ([i915#3555] / [i915#9323])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-tglu:         NOTRUN -> [SKIP][9] ([i915#7697])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-rkl:          NOTRUN -> [SKIP][10] ([i915#6335])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu:         NOTRUN -> [SKIP][11] ([i915#6335])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_create@create-ext-set-pat:
    - shard-rkl:          NOTRUN -> [SKIP][12] ([i915#8562])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_isolation@preservation-s3:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][13] ([i915#13356]) +1 other test incomplete
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk10/igt@gem_ctx_isolation@preservation-s3.html

  * igt@gem_ctx_persistence@heartbeat-close:
    - shard-dg2:          NOTRUN -> [SKIP][14] ([i915#8555])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@gem_ctx_persistence@heartbeat-close.html

  * igt@gem_ctx_sseu@engines:
    - shard-tglu:         NOTRUN -> [SKIP][15] ([i915#280])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@gem_ctx_sseu@engines.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglu-1:       NOTRUN -> [SKIP][16] ([i915#280])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@in-flight-suspend:
    - shard-dg1:          [PASS][17] -> [DMESG-WARN][18] ([i915#4391] / [i915#4423])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-14/igt@gem_eio@in-flight-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-19/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@kms:
    - shard-tglu-1:       NOTRUN -> [DMESG-WARN][19] ([i915#13363])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel:
    - shard-tglu-1:       NOTRUN -> [SKIP][20] ([i915#4525])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-rkl:          NOTRUN -> [SKIP][21] ([i915#4525])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-tglu:         NOTRUN -> [SKIP][22] ([i915#4525]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_reloc@basic-gtt-read:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#3281]) +7 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-read.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-tglu:         NOTRUN -> [SKIP][24] ([i915#4613] / [i915#7582])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          NOTRUN -> [SKIP][25] ([i915#4613]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@massive:
    - shard-tglu:         NOTRUN -> [SKIP][26] ([i915#4613])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@gem_lmem_swapping@massive.html

  * igt@gem_lmem_swapping@random:
    - shard-glk:          NOTRUN -> [SKIP][27] ([i915#4613])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@gem_lmem_swapping@random.html

  * igt@gem_mmap_gtt@basic-small-bo:
    - shard-dg2:          NOTRUN -> [SKIP][28] ([i915#4077])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@gem_mmap_gtt@basic-small-bo.html

  * igt@gem_mmap_wc@write-gtt-read-wc:
    - shard-dg2:          NOTRUN -> [SKIP][29] ([i915#4083])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@gem_mmap_wc@write-gtt-read-wc.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-tglu:         NOTRUN -> [WARN][30] ([i915#2658])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pwrite_snooped:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#3282])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@gem_pwrite_snooped.html

  * igt@gem_pxp@create-regular-context-1:
    - shard-dg2:          NOTRUN -> [SKIP][32] ([i915#4270])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@gem_pxp@create-regular-context-1.html

  * igt@gem_pxp@hw-rejects-pxp-buffer:
    - shard-tglu:         NOTRUN -> [SKIP][33] ([i915#13398])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@gem_pxp@hw-rejects-pxp-buffer.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#5190] / [i915#8428])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#3282]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-tglu:         NOTRUN -> [SKIP][36] ([i915#3297]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-tglu:         NOTRUN -> [SKIP][37] ([i915#2527] / [i915#2856]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-tglu-1:       NOTRUN -> [SKIP][38] ([i915#2527] / [i915#2856]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([i915#2527]) +2 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gen9_exec_parse@bb-start-far.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-dg2:          NOTRUN -> [SKIP][40] ([i915#2856]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@gen9_exec_parse@secure-batches.html

  * igt@i915_module_load@load:
    - shard-snb:          ([PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65]) -> ([PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [SKIP][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@i915_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@i915_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb5/igt@i915_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb1/igt@i915_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb1/igt@i915_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb1/igt@i915_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb1/igt@i915_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb1/igt@i915_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb6/igt@i915_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@i915_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb5/igt@i915_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb6/igt@i915_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb6/igt@i915_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb5/igt@i915_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb5/igt@i915_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb6/igt@i915_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb6/igt@i915_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb5/igt@i915_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@i915_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@i915_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@i915_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@i915_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@i915_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@i915_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@i915_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb6/igt@i915_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb7/igt@i915_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb7/igt@i915_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb1/igt@i915_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb4/igt@i915_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb6/igt@i915_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb1/igt@i915_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@i915_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb4/igt@i915_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb7/igt@i915_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@i915_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@i915_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb4/igt@i915_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb6/igt@i915_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb6/igt@i915_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb1/igt@i915_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb7/igt@i915_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb6/igt@i915_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@i915_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb1/igt@i915_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb1/igt@i915_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb7/igt@i915_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@i915_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb4/igt@i915_module_load@load.html

  * igt@i915_module_load@resize-bar:
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#6412])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][91] ([i915#8399])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_pm_rc6_residency@media-rc6-accuracy:
    - shard-rkl:          NOTRUN -> [SKIP][92] +14 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@i915_pm_rc6_residency@media-rc6-accuracy.html

  * igt@i915_pm_sseu@full-enable:
    - shard-tglu:         NOTRUN -> [SKIP][93] ([i915#4387])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@i915_pm_sseu@full-enable.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][94] ([i915#4212])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-tglu:         NOTRUN -> [SKIP][95] ([i915#12454] / [i915#12712])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][96] ([i915#1769] / [i915#3555])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-tglu-1:       NOTRUN -> [SKIP][97] ([i915#1769] / [i915#3555])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-tglu:         NOTRUN -> [SKIP][98] ([i915#5286]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][99] ([i915#5286]) +5 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-tglu-1:       NOTRUN -> [SKIP][100] ([i915#5286]) +1 other test skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [PASS][101] -> [FAIL][102] ([i915#5138])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([i915#3638]) +3 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#4538] / [i915#5190]) +4 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][105] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
    - shard-glk10:        NOTRUN -> [SKIP][106] +35 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk10/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#14098] / [i915#6095]) +40 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#6095]) +65 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#6095]) +119 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-12/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][110] ([i915#14544] / [i915#6095]) +7 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][111] ([i915#12313])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#10307] / [i915#6095]) +98 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-11/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-a-dp-3.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][113] ([i915#12313])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#12313])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
    - shard-tglu-1:       NOTRUN -> [SKIP][115] ([i915#12313])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][116] ([i915#12805])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([i915#6095]) +11 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][118] ([i915#6095]) +44 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#14098] / [i915#14544] / [i915#6095]) +4 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][120] ([i915#6095]) +29 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-tglu-1:       NOTRUN -> [SKIP][121] ([i915#3742])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#13783]) +3 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-dg2:          NOTRUN -> [SKIP][123] ([i915#11151] / [i915#7828])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-rkl:          NOTRUN -> [SKIP][124] ([i915#11151] / [i915#7828]) +4 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
    - shard-tglu-1:       NOTRUN -> [SKIP][125] ([i915#11151] / [i915#7828]) +2 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
    - shard-tglu:         NOTRUN -> [SKIP][126] ([i915#11151] / [i915#7828]) +6 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_chamelium_hpd@vga-hpd-fast.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][127] ([i915#3116] / [i915#3299])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@legacy:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#7118] / [i915#9424]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-1:
    - shard-dg2:          NOTRUN -> [SKIP][129] ([i915#9424])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-tglu-1:       NOTRUN -> [SKIP][130] ([i915#6944] / [i915#9424]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-dg2:          NOTRUN -> [SKIP][131] ([i915#3555]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][132] ([i915#13049])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-rkl:          NOTRUN -> [SKIP][133] ([i915#3555]) +4 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][134] ([i915#13566])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-128x42@pipe-a-hdmi-a-2.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-tglu-1:       NOTRUN -> [SKIP][135] ([i915#13049])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-snb:          [PASS][136] -> [INCOMPLETE][137] ([i915#14152] / [i915#7882])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@kms_cursor_crc@cursor-suspend.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-1:
    - shard-snb:          [PASS][138] -> [INCOMPLETE][139] ([i915#14152])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb7/igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-1.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb5/igt@kms_cursor_crc@cursor-suspend@pipe-b-hdmi-a-1.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][140] ([i915#4103])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][141] +25 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
    - shard-dg2:          NOTRUN -> [SKIP][142] ([i915#13046] / [i915#5354])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-dg1:          [PASS][143] -> [DMESG-WARN][144] ([i915#4423])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-19/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-15/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-rkl:          NOTRUN -> [SKIP][145] ([i915#9067])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-tglu:         NOTRUN -> [SKIP][146] ([i915#4103])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][147] ([i915#13691])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-tglu-1:       NOTRUN -> [SKIP][148] ([i915#1769] / [i915#3555] / [i915#3804])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][149] ([i915#3804])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dp_aux_dev:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#1257])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_dp_aux_dev.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([i915#13749])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-tglu-1:       NOTRUN -> [SKIP][152] ([i915#13748])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dsc@dsc-basic:
    - shard-tglu:         NOTRUN -> [SKIP][153] ([i915#3555] / [i915#3840])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-tglu-1:       NOTRUN -> [SKIP][154] ([i915#3555] / [i915#3840])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_feature_discovery@display-3x:
    - shard-tglu:         NOTRUN -> [SKIP][155] ([i915#1839])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-rkl:          NOTRUN -> [SKIP][156] ([i915#9337])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-tglu:         NOTRUN -> [SKIP][157] ([i915#658])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][158] ([i915#3637] / [i915#9934]) +4 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-busy-flip:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#9934])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@kms_flip@2x-busy-flip.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][160] ([i915#9934]) +3 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-tglu-1:       NOTRUN -> [SKIP][161] ([i915#3637] / [i915#9934]) +4 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3:
    - shard-dg2:          [PASS][162] -> [FAIL][163] ([i915#13027]) +1 other test fail
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-1/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3.html
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-6/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3.html

  * igt@kms_flip@plain-flip-ts-check-interruptible:
    - shard-snb:          [PASS][164] -> [FAIL][165] ([i915#14600]) +1 other test fail
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-snb4/igt@kms_flip@plain-flip-ts-check-interruptible.html
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-snb4/igt@kms_flip@plain-flip-ts-check-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][166] ([i915#2672] / [i915#3555])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][167] ([i915#2587] / [i915#2672] / [i915#3555])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][168] ([i915#2587] / [i915#2672]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][169] ([i915#2672] / [i915#3555]) +2 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][170] ([i915#2587] / [i915#2672]) +2 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][171] ([i915#2672] / [i915#3555]) +4 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][172] ([i915#2672]) +4 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#1825]) +24 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#5354]) +5 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][175] +41 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#15102]) +2 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-rkl:          NOTRUN -> [SKIP][177] ([i915#15102] / [i915#3023]) +10 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglu:         NOTRUN -> [SKIP][178] ([i915#15102]) +15 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][179] ([i915#8708]) +4 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#15102] / [i915#3458]) +2 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-tglu-1:       NOTRUN -> [SKIP][181] ([i915#15102]) +10 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-dg2:          [PASS][182] -> [SKIP][183] ([i915#3555] / [i915#8228])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-11/igt@kms_hdr@bpc-switch-suspend.html
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#3555] / [i915#8228]) +2 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-swap:
    - shard-tglu:         NOTRUN -> [SKIP][185] ([i915#3555] / [i915#8228])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][186] ([i915#3555] / [i915#8228])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][187] ([i915#12388])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][188] ([i915#15283])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][189] ([i915#12339])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-tglu-1:       NOTRUN -> [SKIP][190] ([i915#12339])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([i915#6301])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_panel_fitting@legacy:
    - shard-rkl:          NOTRUN -> [SKIP][192] ([i915#6301])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane_alpha_blend@alpha-basic:
    - shard-glk:          NOTRUN -> [FAIL][193] ([i915#12178])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@kms_plane_alpha_blend@alpha-basic.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][194] ([i915#7862]) +1 other test fail
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-tglu:         NOTRUN -> [SKIP][195] ([i915#13958]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
    - shard-rkl:          NOTRUN -> [SKIP][196] ([i915#12247]) +3 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-tglu-1:       NOTRUN -> [SKIP][197] ([i915#3555]) +5 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b:
    - shard-tglu-1:       NOTRUN -> [SKIP][198] ([i915#12247]) +3 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#12247]) +9 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([i915#5354])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#12343])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][202] ([i915#9812]) +1 other test skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#3828])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-tglu-1:       NOTRUN -> [SKIP][204] ([i915#3828])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][205] ([i915#15073]) +1 other test skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          [PASS][206] -> [SKIP][207] ([i915#15073]) +2 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg2:          [PASS][208] -> [SKIP][209] ([i915#15073])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-tglu:         NOTRUN -> [SKIP][210] ([i915#6524]) +1 other test skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][211] ([i915#11520]) +1 other test skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][212] ([i915#11520]) +3 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][213] ([i915#11520]) +6 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][214] ([i915#11520]) +6 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-glk10:        NOTRUN -> [SKIP][215] ([i915#11520])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-tglu:         NOTRUN -> [SKIP][216] ([i915#9683])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-7/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr-no-drrs:
    - shard-tglu:         NOTRUN -> [SKIP][217] ([i915#9732]) +12 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_psr@fbc-psr-no-drrs.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#1072] / [i915#9732]) +5 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-tglu-1:       NOTRUN -> [SKIP][219] ([i915#9732]) +10 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_psr@psr2-sprite-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][220] ([i915#1072] / [i915#9732]) +10 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_psr@psr2-sprite-mmap-cpu.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-rkl:          NOTRUN -> [SKIP][221] ([i915#5289])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][222] ([i915#12755])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-tglu:         NOTRUN -> [SKIP][223] ([i915#5289])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-tglu:         NOTRUN -> [SKIP][224] ([i915#3555]) +2 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_setmode@basic:
    - shard-dg2:          [PASS][225] -> [FAIL][226] ([i915#15106])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-11/igt@kms_setmode@basic.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_setmode@basic.html
    - shard-rkl:          [PASS][227] -> [FAIL][228] ([i915#15106])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_setmode@basic.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_setmode@basic.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [FAIL][229] ([i915#15106]) +1 other test fail
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
    - shard-rkl:          NOTRUN -> [FAIL][230] ([i915#15106]) +1 other test fail
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-rkl:          NOTRUN -> [SKIP][231] ([i915#15232]) +1 other test skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_sharpness_filter@filter-toggle:
    - shard-tglu:         NOTRUN -> [SKIP][232] ([i915#15232]) +1 other test skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_sharpness_filter@filter-toggle.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-dg2:          NOTRUN -> [SKIP][233] ([i915#15232])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-tglu-1:       NOTRUN -> [SKIP][234] ([i915#15232]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-glk:          NOTRUN -> [FAIL][235] ([i915#10959])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#8623])
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-mtlp:         [PASS][237] -> [FAIL][238] ([i915#9196]) +1 other test fail
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak.html
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-3/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@kms_vrr@flip-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][239] ([i915#15243] / [i915#3555])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@max-min:
    - shard-tglu:         NOTRUN -> [SKIP][240] ([i915#9906])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@kms_vrr@max-min.html

  * igt@kms_vrr@negative-basic:
    - shard-glk:          NOTRUN -> [SKIP][241] +63 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-glk6/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-tglu-1:       NOTRUN -> [SKIP][242] ([i915#9906])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-1/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-rkl:          NOTRUN -> [SKIP][243] ([i915#2437] / [i915#9412])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#2437])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][245] ([i915#2433])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][246] ([i915#8516])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@perf_pmu@rc6-all-gts.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][247] ([i915#3708])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@prime_vgem@coherency-gtt.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-random:
    - shard-tglu:         NOTRUN -> [FAIL][248] ([i915#12910]) +8 other tests fail
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-8/igt@sriov_basic@enable-vfs-bind-unbind-each@numvfs-random.html

  
#### Possible fixes ####

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-tglu:         [WARN][249] ([i915#13790] / [i915#2681]) -> [PASS][250] +1 other test pass
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-tglu-3/igt@i915_pm_rc6_residency@rc6-fence.html
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [DMESG-FAIL][251] ([i915#12061]) -> [PASS][252] +1 other test pass
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-5/igt@i915_selftest@live@workarounds.html
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-2/igt@i915_selftest@live@workarounds.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-rkl:          [INCOMPLETE][253] ([i915#12761]) -> [PASS][254] +1 other test pass
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_async_flips@async-flip-suspend-resume.html
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [FAIL][255] ([i915#5138]) -> [PASS][256]
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-3:
    - shard-dg2:          [INCOMPLETE][257] ([i915#12796]) -> [PASS][258] +1 other test pass
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-3.html
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-3.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4:
    - shard-dg1:          [DMESG-WARN][259] ([i915#4423]) -> [PASS][260] +1 other test pass
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-rkl:          [INCOMPLETE][261] ([i915#10056]) -> [PASS][262]
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_hdr@static-toggle:
    - shard-rkl:          [SKIP][263] ([i915#3555] / [i915#8228]) -> [PASS][264] +2 other tests pass
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_hdr@static-toggle.html
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-1/igt@kms_hdr@static-toggle.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][265] ([i915#15073]) -> [PASS][266] +3 other tests pass
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-1/igt@kms_pm_rpm@dpms-lpsp.html
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@system-suspend-idle:
    - shard-dg2:          [INCOMPLETE][267] ([i915#14419]) -> [PASS][268]
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-5/igt@kms_pm_rpm@system-suspend-idle.html
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-3/igt@kms_pm_rpm@system-suspend-idle.html

  * igt@kms_setmode@basic:
    - shard-mtlp:         [FAIL][269] ([i915#15106]) -> [PASS][270] +1 other test pass
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-4/igt@kms_setmode@basic.html
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-6/igt@kms_setmode@basic.html

  * igt@perf_pmu@busy-double-start@rcs0:
    - shard-mtlp:         [FAIL][271] ([i915#4349]) -> [PASS][272]
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-mtlp-6/igt@perf_pmu@busy-double-start@rcs0.html
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-mtlp-8/igt@perf_pmu@busy-double-start@rcs0.html

  
#### Warnings ####

  * igt@api_intel_bb@crc32:
    - shard-rkl:          [SKIP][273] ([i915#6230]) -> [SKIP][274] ([i915#14544] / [i915#6230])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@api_intel_bb@crc32.html
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@api_intel_bb@crc32.html

  * igt@api_intel_bb@object-reloc-keep-cache:
    - shard-rkl:          [SKIP][275] ([i915#14544] / [i915#8411]) -> [SKIP][276] ([i915#8411])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@api_intel_bb@object-reloc-keep-cache.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@api_intel_bb@object-reloc-keep-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-rkl:          [SKIP][277] ([i915#11078] / [i915#14544]) -> [SKIP][278] ([i915#11078])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@device_reset@unbind-cold-reset-rebind.html
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@gem_bad_reloc@negative-reloc-lut:
    - shard-rkl:          [SKIP][279] ([i915#14544] / [i915#3281]) -> [SKIP][280] ([i915#3281]) +4 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_bad_reloc@negative-reloc-lut.html
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          [SKIP][281] ([i915#7697]) -> [SKIP][282] ([i915#14544] / [i915#7697]) +1 other test skip
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@gem_basic@multigpu-create-close.html
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@suspend-resume:
    - shard-rkl:          [SKIP][283] ([i915#14544] / [i915#9323]) -> [SKIP][284] ([i915#9323])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_ccs@suspend-resume.html
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_ccs@suspend-resume.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          [SKIP][285] ([i915#14544] / [i915#7697]) -> [SKIP][286] ([i915#7697])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_close_race@multigpu-basic-threads.html
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_ctx_sseu@engines:
    - shard-rkl:          [SKIP][287] ([i915#14544] / [i915#280]) -> [SKIP][288] ([i915#280])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_ctx_sseu@engines.html
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_ctx_sseu@engines.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-rkl:          [SKIP][289] ([i915#14544] / [i915#4525]) -> [SKIP][290] ([i915#4525])
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_exec_balancer@parallel-bb-first.html
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_balancer@parallel-dmabuf-import-out-fence:
    - shard-rkl:          [SKIP][291] ([i915#4525]) -> [SKIP][292] ([i915#14544] / [i915#4525])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html

  * igt@gem_exec_reloc@basic-gtt-cpu:
    - shard-rkl:          [SKIP][293] ([i915#3281]) -> [SKIP][294] ([i915#14544] / [i915#3281]) +6 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@gem_exec_reloc@basic-gtt-cpu.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-cpu.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          [SKIP][295] ([i915#4613] / [i915#7582]) -> [SKIP][296] ([i915#14544] / [i915#4613] / [i915#7582])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@gem_lmem_evict@dontneed-evict-race.html
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-rkl:          [SKIP][297] ([i915#4613]) -> [SKIP][298] ([i915#14544] / [i915#4613])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@gem_lmem_swapping@parallel-random.html
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-rkl:          [SKIP][299] ([i915#14544] / [i915#4613]) -> [SKIP][300] ([i915#4613]) +1 other test skip
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_media_vme:
    - shard-rkl:          [SKIP][301] ([i915#284]) -> [SKIP][302] ([i915#14544] / [i915#284])
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@gem_media_vme.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_media_vme.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-rkl:          [SKIP][303] ([i915#14544] / [i915#3282]) -> [SKIP][304] ([i915#3282]) +4 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_partial_pwrite_pread@reads-uncached.html
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_partial_pwrite_pread@write-display:
    - shard-rkl:          [SKIP][305] ([i915#3282]) -> [SKIP][306] ([i915#14544] / [i915#3282]) +3 other tests skip
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@gem_partial_pwrite_pread@write-display.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_partial_pwrite_pread@write-display.html

  * igt@gem_pxp@hw-rejects-pxp-buffer:
    - shard-rkl:          [SKIP][307] ([i915#13717] / [i915#14544]) -> [SKIP][308] ([i915#13717])
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-buffer.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@gem_pxp@hw-rejects-pxp-buffer.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-rkl:          [SKIP][309] ([i915#13717]) -> [SKIP][310] ([i915#13717] / [i915#14544])
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@gem_pxp@hw-rejects-pxp-context.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_set_tiling_vs_blt@tiled-to-tiled:
    - shard-rkl:          [SKIP][311] ([i915#8411]) -> [SKIP][312] ([i915#14544] / [i915#8411])
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          [SKIP][313] ([i915#14544] / [i915#3297]) -> [SKIP][314] ([i915#3297]) +3 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gem_userptr_blits@create-destroy-unsync.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-rkl:          [SKIP][315] ([i915#3297]) -> [SKIP][316] ([i915#14544] / [i915#3297]) +1 other test skip
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@gem_userptr_blits@unsync-overlap.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-rkl:          [SKIP][317] ([i915#14544] / [i915#2527]) -> [SKIP][318] ([i915#2527]) +2 other tests skip
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@gen9_exec_parse@bb-start-param.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          [SKIP][319] ([i915#2527]) -> [SKIP][320] ([i915#14544] / [i915#2527]) +1 other test skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@gen9_exec_parse@shadow-peek.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_pm_sseu@full-enable:
    - shard-rkl:          [SKIP][321] ([i915#14544] / [i915#4387]) -> [SKIP][322] ([i915#4387])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@i915_pm_sseu@full-enable.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@i915_pm_sseu@full-enable.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-rkl:          [SKIP][323] ([i915#14544] / [i915#1769] / [i915#3555]) -> [SKIP][324] ([i915#1769] / [i915#3555])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-180:
    - shard-rkl:          [SKIP][325] ([i915#14544] / [i915#5286]) -> [SKIP][326] ([i915#5286]) +2 other tests skip
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          [SKIP][327] ([i915#5286]) -> [SKIP][328] ([i915#14544] / [i915#5286]) +3 other tests skip
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-rkl:          [SKIP][329] ([i915#14544] / [i915#3638]) -> [SKIP][330] ([i915#3638]) +1 other test skip
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-90.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          [SKIP][331] ([i915#3638]) -> [SKIP][332] ([i915#14544] / [i915#3638]) +3 other tests skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_big_fb@linear-64bpp-rotate-90.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-rkl:          [SKIP][333] ([i915#12313]) -> [SKIP][334] ([i915#12313] / [i915#14544])
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
    - shard-rkl:          [SKIP][335] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][336] ([i915#14098] / [i915#6095]) +14 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-rkl:          [SKIP][337] ([i915#14098] / [i915#6095]) -> [SKIP][338] ([i915#14098] / [i915#14544] / [i915#6095]) +12 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][339] ([i915#6095]) -> [SKIP][340] ([i915#14544] / [i915#6095]) +6 other tests skip
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][341] ([i915#14544] / [i915#6095]) -> [SKIP][342] ([i915#6095]) +7 other tests skip
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-2.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_cdclk@plane-scaling:
    - shard-rkl:          [SKIP][343] ([i915#14544] / [i915#3742]) -> [SKIP][344] ([i915#3742])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_cdclk@plane-scaling.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_color@degamma:
    - shard-rkl:          [SKIP][345] ([i915#14544]) -> [SKIP][346] +9 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_chamelium_color@degamma.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_frames@dp-frame-dump:
    - shard-rkl:          [SKIP][347] ([i915#11151] / [i915#7828]) -> [SKIP][348] ([i915#11151] / [i915#14544] / [i915#7828]) +5 other tests skip
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_chamelium_frames@dp-frame-dump.html
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_chamelium_frames@dp-frame-dump.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-rkl:          [SKIP][349] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][350] ([i915#11151] / [i915#7828]) +5 other tests skip
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-multiple.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-rkl:          [SKIP][351] ([i915#14544] / [i915#7118] / [i915#9424]) -> [SKIP][352] ([i915#7118] / [i915#9424])
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_content_protection@atomic-dpms.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][353] ([i915#9433]) -> [SKIP][354] ([i915#9424])
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-12/igt@kms_content_protection@mei-interface.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-14/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          [FAIL][355] ([i915#7173]) -> [SKIP][356] ([i915#7118])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-11/igt@kms_content_protection@srm.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_content_protection@srm.html
    - shard-rkl:          [SKIP][357] ([i915#14544] / [i915#7118]) -> [SKIP][358] ([i915#7118])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_content_protection@srm.html
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-rkl:          [SKIP][359] ([i915#13049]) -> [SKIP][360] ([i915#13049] / [i915#14544]) +1 other test skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-512x512.html
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-rkl:          [SKIP][361] ([i915#14544] / [i915#3555]) -> [SKIP][362] ([i915#3555]) +2 other tests skip
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][363] ([i915#3555]) -> [SKIP][364] ([i915#14544] / [i915#3555]) +2 other tests skip
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-rkl:          [SKIP][365] -> [SKIP][366] ([i915#14544]) +14 other tests skip
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-rkl:          [SKIP][367] ([i915#14544] / [i915#4103]) -> [SKIP][368] ([i915#4103])
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-rkl:          [SKIP][369] ([i915#13749] / [i915#14544]) -> [SKIP][370] ([i915#13749])
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_dp_link_training@non-uhbr-mst.html
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-rkl:          [SKIP][371] ([i915#13748] / [i915#14544]) -> [SKIP][372] ([i915#13748])
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_dp_link_training@uhbr-sst.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-rkl:          [SKIP][373] ([i915#13707]) -> [SKIP][374] ([i915#13707] / [i915#14544])
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-basic:
    - shard-rkl:          [SKIP][375] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][376] ([i915#3555] / [i915#3840])
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_dsc@dsc-basic.html
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_dsc@dsc-basic.html

  * igt@kms_feature_discovery@display-3x:
    - shard-rkl:          [SKIP][377] ([i915#1839]) -> [SKIP][378] ([i915#14544] / [i915#1839])
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_feature_discovery@display-3x.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-rkl:          [SKIP][379] ([i915#14544] / [i915#1839]) -> [SKIP][380] ([i915#1839])
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_feature_discovery@display-4x.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-rkl:          [SKIP][381] ([i915#14544] / [i915#9934]) -> [SKIP][382] ([i915#9934]) +6 other tests skip
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_flip@2x-modeset-vs-vblank-race.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          [SKIP][383] ([i915#9934]) -> [SKIP][384] ([i915#14544] / [i915#9934]) +6 other tests skip
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_flip@2x-plain-flip.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-rkl:          [SKIP][385] ([i915#2672] / [i915#3555]) -> [SKIP][386] ([i915#14544] / [i915#2672] / [i915#3555]) +2 other tests skip
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-rkl:          [SKIP][387] ([i915#2672]) -> [SKIP][388] ([i915#14544] / [i915#2672]) +2 other tests skip
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
    - shard-rkl:          [SKIP][389] ([i915#14544] / [i915#2672] / [i915#3555]) -> [SKIP][390] ([i915#2672] / [i915#3555]) +1 other test skip
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
    - shard-dg1:          [SKIP][391] ([i915#2672] / [i915#3555]) -> [SKIP][392] ([i915#2672] / [i915#3555] / [i915#4423])
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          [SKIP][393] ([i915#14544] / [i915#2672]) -> [SKIP][394] ([i915#2672]) +1 other test skip
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
    - shard-dg1:          [SKIP][395] ([i915#2587] / [i915#2672]) -> [SKIP][396] ([i915#2587] / [i915#2672] / [i915#4423])
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-rkl:          [SKIP][397] ([i915#15102]) -> [SKIP][398] ([i915#14544] / [i915#15102]) +1 other test skip
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-rkl:          [SKIP][399] ([i915#15102] / [i915#3023]) -> [SKIP][400] ([i915#14544] / [i915#15102] / [i915#3023]) +9 other tests skip
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-dg1:          [SKIP][401] ([i915#8708]) -> [SKIP][402] ([i915#4423] / [i915#8708])
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][403] ([i915#1825]) -> [SKIP][404] ([i915#14544] / [i915#1825]) +29 other tests skip
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
    - shard-dg1:          [SKIP][405] ([i915#4423]) -> [SKIP][406]
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
    - shard-dg1:          [SKIP][407] ([i915#4423] / [i915#8708]) -> [SKIP][408] ([i915#8708])
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt:
    - shard-rkl:          [SKIP][409] ([i915#14544] / [i915#15102]) -> [SKIP][410] ([i915#15102]) +4 other tests skip
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt.html
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
    - shard-dg2:          [SKIP][411] ([i915#15102] / [i915#3458]) -> [SKIP][412] ([i915#10433] / [i915#15102] / [i915#3458]) +1 other test skip
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][413] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][414] ([i915#15102] / [i915#3023]) +12 other tests skip
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render:
    - shard-dg1:          [SKIP][415] ([i915#15102] / [i915#3458]) -> [SKIP][416] ([i915#15102] / [i915#3458] / [i915#4423])
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render:
    - shard-rkl:          [SKIP][417] ([i915#14544] / [i915#1825]) -> [SKIP][418] ([i915#1825]) +26 other tests skip
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          [SKIP][419] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][420] ([i915#15102] / [i915#3458])
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          [SKIP][421] ([i915#12713]) -> [SKIP][422] ([i915#14544])
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_hdr@brightness-with-hdr.html
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-rkl:          [SKIP][423] ([i915#10656]) -> [SKIP][424] ([i915#10656] / [i915#14544])
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_joiner@basic-big-joiner.html
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-rkl:          [SKIP][425] ([i915#14544] / [i915#14712]) -> [SKIP][426] ([i915#14712])
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-rkl:          [SKIP][427] ([i915#13958]) -> [SKIP][428] ([i915#13958] / [i915#14544]) +1 other test skip
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-2/igt@kms_plane_multiple@2x-tiling-4.html
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@tiling-4:
    - shard-rkl:          [SKIP][429] ([i915#14259]) -> [SKIP][430] ([i915#14259] / [i915#14544])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_plane_multiple@tiling-4.html
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_plane_multiple@tiling-4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
    - shard-rkl:          [SKIP][431] ([i915#12247] / [i915#14544]) -> [SKIP][432] ([i915#12247]) +3 other tests skip
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
    - shard-rkl:          [SKIP][433] ([i915#12247]) -> [SKIP][434] ([i915#12247] / [i915#14544]) +7 other tests skip
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          [SKIP][435] ([i915#14544] / [i915#5354]) -> [SKIP][436] ([i915#5354])
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_pm_backlight@fade-with-suspend.html
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [SKIP][437] ([i915#15128]) -> [FAIL][438] ([i915#9295])
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-tglu-6/igt@kms_pm_dc@dc6-dpms.html
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][439] ([i915#14544] / [i915#4281]) -> [SKIP][440] ([i915#4281])
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_pm_dc@dc9-dpms.html
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-8/igt@kms_pm_dc@dc9-dpms.html
    - shard-tglu:         [SKIP][441] ([i915#4281]) -> [SKIP][442] ([i915#15128])
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-tglu-2/igt@kms_pm_dc@dc9-dpms.html
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-rkl:          [SKIP][443] ([i915#8430]) -> [SKIP][444] ([i915#14544] / [i915#8430])
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_pm_lpsp@screens-disabled.html
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_prime@d3hot:
    - shard-rkl:          [SKIP][445] ([i915#6524]) -> [SKIP][446] ([i915#14544] / [i915#6524])
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_prime@d3hot.html
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
    - shard-rkl:          [SKIP][447] ([i915#11520]) -> [SKIP][448] ([i915#11520] / [i915#14544]) +6 other tests skip
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
    - shard-rkl:          [SKIP][449] ([i915#11520] / [i915#14544]) -> [SKIP][450] ([i915#11520]) +5 other tests skip
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr@psr2-cursor-mmap-gtt:
    - shard-rkl:          [SKIP][451] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][452] ([i915#1072] / [i915#9732]) +16 other tests skip
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_psr@psr2-cursor-mmap-gtt.html
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_psr@psr2-cursor-mmap-gtt.html

  * igt@kms_psr@psr2-primary-mmap-gtt:
    - shard-rkl:          [SKIP][453] ([i915#1072] / [i915#9732]) -> [SKIP][454] ([i915#1072] / [i915#14544] / [i915#9732]) +13 other tests skip
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_psr@psr2-primary-mmap-gtt.html
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_psr@psr2-primary-mmap-gtt.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-rkl:          [SKIP][455] ([i915#9685]) -> [SKIP][456] ([i915#14544] / [i915#9685])
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-rkl:          [SKIP][457] ([i915#5289]) -> [SKIP][458] ([i915#14544] / [i915#5289])
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_sharpness_filter@filter-formats:
    - shard-rkl:          [SKIP][459] ([i915#15232]) -> [SKIP][460] ([i915#14544] / [i915#15232]) +2 other tests skip
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_sharpness_filter@filter-formats.html
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_sharpness_filter@filter-formats.html

  * igt@kms_sharpness_filter@filter-toggle:
    - shard-rkl:          [SKIP][461] ([i915#14544] / [i915#15232]) -> [SKIP][462] ([i915#15232]) +1 other test skip
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_sharpness_filter@filter-toggle.html
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-4/igt@kms_sharpness_filter@filter-toggle.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-rkl:          [SKIP][463] ([i915#9906]) -> [SKIP][464] ([i915#14544] / [i915#9906]) +1 other test skip
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@kms_vrr@flip-basic-fastset.html
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-dpms:
    - shard-rkl:          [SKIP][465] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][466] ([i915#15243] / [i915#3555])
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@kms_vrr@flip-dpms.html
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@kms_vrr@flip-dpms.html

  * igt@perf@mi-rpc:
    - shard-rkl:          [SKIP][467] ([i915#2434]) -> [SKIP][468] ([i915#14544] / [i915#2434])
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@perf@mi-rpc.html
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@perf@mi-rpc.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-rkl:          [SKIP][469] ([i915#14544] / [i915#3708]) -> [SKIP][470] ([i915#3708])
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@prime_vgem@fence-flip-hang.html
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@prime_vgem@fence-flip-hang.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          [SKIP][471] ([i915#9917]) -> [SKIP][472] ([i915#14544] / [i915#9917]) +1 other test skip
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-4/igt@sriov_basic@bind-unbind-vf.html
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-rkl:          [SKIP][473] ([i915#14544] / [i915#9917]) -> [SKIP][474] ([i915#9917])
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17575/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/shard-rkl-5/igt@sriov_basic@enable-vfs-autoprobe-off.html

  
  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13363]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13363
  [i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
  [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
  [i915#15128]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15128
  [i915#15232]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15232
  [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
  [i915#15283]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15283
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
  [i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_17575 -> Patchwork_157793v2

  CI-20190529: 20190529
  CI_DRM_17575: 13909978d70fc4ded88b778a313b68ad86ba881a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8635: 8635
  Patchwork_157793v2: 13909978d70fc4ded88b778a313b68ad86ba881a @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_157793v2/index.html

[-- Attachment #2: Type: text/html, Size: 156647 bytes --]

Re: [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915

[Jani Nikula]

On Thu, 20 Nov 2025, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Wed, Nov 19, 2025 at 08:52:52PM +0200, Jani Nikula wrote:
>>Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
>>both i915 and xe.
>
> I hope this doesn't regress our display side on other archs. We are very
> close to having display working, but this messing with VGA is likely to
> break it.
>
> See "drm/i915/display: Stop touching vga on post enable", which is
> needed for xe to use a DG2/BMG with a raspberry pi (+pci/resources
> branch + a few other patches).

I'm feeling confident [1] that the patch at hand does not have similar
issues. This is about VGA arbitration on the PCI bridge, not about
actually poking at VGA registers.

I went ahead and merged the series. If there are any ill effects with
the last patch, we can revert with a low bar.


BR,
Jani.



[1] https://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect


-- 
Jani Nikula, Intel