From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Richter Subject: Re: [PATCH] drm/i915: Avoid flicker with horizontal panning on 830GM Date: Mon, 02 Sep 2013 15:58:59 +0200 Message-ID: <522499A3.50502@math.tu-berlin.de> References: <522372FD.5080001@math.tu-berlin.de> <2593_1378105810_522439D2_2593_1811_1_20130902071022.GP9374@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from charon.rus.uni-stuttgart.de (charon.rus.uni-stuttgart.de [129.69.192.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 99840E6431 for ; Mon, 2 Sep 2013 06:59:07 -0700 (PDT) In-Reply-To: <2593_1378105810_522439D2_2593_1811_1_20130902071022.GP9374@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Hi Daniel, > I've just looked at the docs and they only mention that the base address > must be pixel aligned. But it could very well be that the watermarks are a > bit off for your chipset. The below quick hack should test this theory. > -Daniel > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index dfdc7ad..990b1f4 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -1673,7 +1673,7 @@ static void i830_update_wm(struct drm_device *dev) > dev_priv->display.get_fifo_size(dev, 0), > 4, latency_ns); > fwater_lo = I915_READ(FW_BLC)& ~0xfff; > - fwater_lo |= (3<<8) | planea_wm; > + fwater_lo |= (3<<8) | 0; > > DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm); > Checked with the above modifications. Unfortunately, the result is negative. With the above modifications and my changes commented out, the screen flickers in normal state (without panning) but in a different way: With the above enabled, you get a rather irregular almost pseudo-random flicker, and not the 60/30Hz flicker I see when panning horizontally. If I add horizontal panning, then I also get this irregular flicker, except when scrolling to the "forbidden positions" at which I get the regular hi-frequency flicker again. However, now that I checked closer, I found that my patch has also a drawback, namely the hardware scroll position and the requested scroll position disagrees, i.e. the mouse pointer is not exactly where it should be, i.e. the mouse pointer hot-spot is off. Is there a way to indicate the calling method what the actual panning/scroll position is if it is different from the requested position? Is there a different method to scroll the screen than to adjust the screen origin? Old hardware had not only a screen pointer, but also a pixel-offset (horizontal scroll) register. Is there something like this on the 830M to work around the observed trouble? Greetings, Thomas PS: A closer inspection shows that the screen flickers if the panning position x has the property that (x mod 16) != 0. Strange enough.