From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thomas Richter <thor@math.tu-berlin.de>
Subject: Re: Workaround for flicker with panning on the i830 -
 found a way for tiled displays
Date: Fri, 15 Nov 2013 18:01:34 +0100
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To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
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Hi Daniel,
> Gosh, should have read the code more closely. We have a totally botched wm
> setup on i830M - the watermark code for the 2nd pipe is just not there!

Well, nice try, but no cigar. (-: That's actually much worse than 
before. The display is now unstable on *both* the internal
and external display, and inspecting the FW_BLC register, it is 
completely off. The current code leaves it at 0x1050101, but
it should be at least 0x1060106, that is, the watermark needs to be 
higher, not lower. I still don't understand why a higher
latency causes a lower watermark, but maybe things work different than 
in my mental model.

Greetings,
     Thomas