From mboxrd@z Thu Jan 1 00:00:00 1970 From: Todd Previte Subject: Re: [PATCH] drm/i915: Enable 5.4Ghz (HBR2) link rate for Displayport 1.2-capable devices Date: Fri, 17 Jan 2014 08:22:31 -0700 Message-ID: <52D94AB7.5000303@gmail.com> References: <1389927968-2473-1-git-send-email-tprevite@gmail.com> <52D94532.6020800@gmail.com> <20140117150810.GC20988@strange.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pa0-f45.google.com (mail-pa0-f45.google.com [209.85.220.45]) by gabe.freedesktop.org (Postfix) with ESMTP id 6AFB0106044 for ; Fri, 17 Jan 2014 07:22:33 -0800 (PST) Received: by mail-pa0-f45.google.com with SMTP id lf10so1986541pab.4 for ; Fri, 17 Jan 2014 07:22:33 -0800 (PST) In-Reply-To: <20140117150810.GC20988@strange.amr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Damien Lespiau Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org On 1/17/2014 8:08 AM, Damien Lespiau wrote: > On Fri, Jan 17, 2014 at 07:58:58AM -0700, Todd Previte wrote: >>>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >>>> index 7df5085..f92d1c0 100644 >>>> --- a/drivers/gpu/drm/i915/intel_dp.c >>>> +++ b/drivers/gpu/drm/i915/intel_dp.c >>>> @@ -102,7 +102,10 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp) >>>> case DP_LINK_BW_2_7: >>>> break; >>>> case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */ >>>> - max_link_bw = DP_LINK_BW_2_7; >>>> + if (intel_dp->dpcd[DP_DPCD_REV] == 0x12) >>>> + max_link_bw = DP_LINK_BW_5_4; >>>> + else >>>> + max_link_bw = DP_LINK_BW_2_7; >>> Is this really required, i.e. do we have dp 1.1 machines in the wild >>> which advertise 5.4 but can't? In any case you also need to have a >>> IS_HSW || IS_BDW check here, since only those two platforms support >>> 5.4 GHz. >> I've not seen a case where a 1.1a capable device advertises HBR2, >> no. I *have* seen the case where the sink reports that it only >> supports RBR (1.62Ghz) but is in fact capable of 2.7Ghz. This is >> more of a safety measure to eliminate potential training problems, >> but is not strictly necessary to support HBR2. It does need the >> IS_HSW || IS_BDW though, so I'll fix that and resend. > Can we make it IS_HSW || INTEL_INFO(dev)->gen >= 8, we can't quite > predict the future but new platforms supporting what old platforms do > support is a bet we take elsewere. > Sounds like a better solution. I should have that integrated shortly. -T