From mboxrd@z Thu Jan  1 00:00:00 1970
From: "S, Deepak" <deepak.s@intel.com>
Subject: Re: [PATCH 3/9] drm/i915: Just print rc6 facts
Date: Fri, 07 Feb 2014 11:14:29 +0530
Message-ID: <52F472BD.6080903@intel.com>
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On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky
> <benjamin.widawsky@intel.com <mailto:benjamin.widawsky@intel.com>> wrote:
>
>     Everything can be overridden by module parameters, so don't confuse the
>     users that are using them.
>
>     We have RC6 turned on for all platforms which support it, but Ironlake,
>     so the need to explain the situation is no longer pressing.
>
>     Signed-off-by: Ben Widawsky <ben@bwidawsk.net <mailto:ben@bwidawsk.net>>
>     ---
>       drivers/gpu/drm/i915/intel_pm.c | 12 +++---------
>       1 file changed, 3 insertions(+), 9 deletions(-)
>
>     diff --git a/drivers/gpu/drm/i915/intel_pm.c
>     b/drivers/gpu/drm/i915/intel_pm.c
>     index 258241b..944b99c 100644
>     --- a/drivers/gpu/drm/i915/intel_pm.c
>     +++ b/drivers/gpu/drm/i915/intel_pm.c
>     @@ -3135,16 +3135,10 @@ static void valleyview_disable_rps(struct
>     drm_device *dev)
>
>       static void intel_print_rc6_info(struct drm_device *dev, u32 mode)
>       {
>     -       if (IS_GEN6(dev))
>     -               DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n");
>     -
>     -       if (IS_HASWELL(dev))
>     -               DRM_DEBUG_DRIVER("Haswell: only RC6 available\n");
>     -
>              DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n",
>     -                       (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off",
>     -                       (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off",
>     -                       (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" :
>     "off");
>     +                (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off",
>     +                (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off",
>     +                (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off");
>       }
>
>       int intel_enable_rc6(const struct drm_device *dev)
>     --
>     1.8.5.3
>
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Reviewed-by: Deepak S <deepak.s@intel.com>