From mboxrd@z Thu Jan 1 00:00:00 1970 From: "S, Deepak" Subject: Re: [PATCH 5/9] drm/i915/bdw: Set rp_state_caps Date: Fri, 07 Feb 2014 11:40:43 +0530 Message-ID: <52F478E3.6000302@intel.com> References: <1390969547-1018-1-git-send-email-benjamin.widawsky@intel.com> <1390969547-1018-7-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id D5596FB4B4 for ; Thu, 6 Feb 2014 22:10:45 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: benjamin.widawsky@intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky > > wrote: > > Signed-off-by: Ben Widawsky > > --- > drivers/gpu/drm/i915/intel_pm.c | 20 +++++++++++++------- > 1 file changed, 13 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 6acb429..ae59bd9 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3184,6 +3184,17 @@ static void gen6_enable_rps_interrupts(struct > drm_device *dev) > I915_WRITE(GEN6_PMINTRMSK, ~enabled_intrs); > } > > +static void parse_rp_state_cap(struct drm_i915_private *dev_priv, > u32 rp_state_cap) > +{ > + /* In units of 50MHz */ > + dev_priv->rps.hw_max = dev_priv->rps.max_delay = > rp_state_cap & 0xff; > + dev_priv->rps.min_delay = (rp_state_cap >> 16) & 0xff; > + dev_priv->rps.rp1_delay = (rp_state_cap >> 8) & 0xff; > + dev_priv->rps.rp0_delay = (rp_state_cap >> 0) & 0xff; > + dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay; > + dev_priv->rps.cur_delay = 0; > +} > + > static void gen8_enable_rps(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > @@ -3202,6 +3213,7 @@ static void gen8_enable_rps(struct drm_device > *dev) > I915_WRITE(GEN6_RC_CONTROL, 0); > > rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); > + parse_rp_state_cap(dev_priv, rp_state_cap); > > /* 2b: Program RC6 thresholds.*/ > I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16); > @@ -3288,13 +3300,7 @@ static void gen6_enable_rps(struct drm_device > *dev) > rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); > gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); > > - /* In units of 50MHz */ > - dev_priv->rps.hw_max = dev_priv->rps.max_delay = > rp_state_cap & 0xff; > - dev_priv->rps.min_delay = (rp_state_cap >> 16) & 0xff; > - dev_priv->rps.rp1_delay = (rp_state_cap >> 8) & 0xff; > - dev_priv->rps.rp0_delay = (rp_state_cap >> 0) & 0xff; > - dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay; > - dev_priv->rps.cur_delay = 0; > + parse_rp_state_cap(dev_priv, rp_state_cap); > > /* disable the counters and set deterministic thresholds */ > I915_WRITE(GEN6_RC_CONTROL, 0); > -- > 1.8.5.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > Looks fine Reviewed-by: Deepak S