From mboxrd@z Thu Jan  1 00:00:00 1970
From: "S, Deepak" <deepak.s@intel.com>
Subject: Re: [PATCH 7/9] drm/i915/bdw: RPS frequency bits are
 the same as HSW
Date: Fri, 07 Feb 2014 11:55:28 +0530
Message-ID: <52F47C58.50705@intel.com>
References: <1390969547-1018-1-git-send-email-benjamin.widawsky@intel.com>	<1390969547-1018-9-git-send-email-benjamin.widawsky@intel.com>
	<CAOh5HuU8bnYppf7D5k39QuuDkbHCUVznuVHzvd2dW1mDN0GpBA@mail.gmail.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; Format="flowed"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mga11.intel.com (mga11.intel.com [192.55.52.93])
	by gabe.freedesktop.org (Postfix) with ESMTP id CFF00FB598
	for <intel-gfx@lists.freedesktop.org>;
	Thu,  6 Feb 2014 22:25:31 -0800 (PST)
In-Reply-To: <CAOh5HuU8bnYppf7D5k39QuuDkbHCUVznuVHzvd2dW1mDN0GpBA@mail.gmail.com>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces@lists.freedesktop.org
Errors-To: intel-gfx-bounces@lists.freedesktop.org
To: benjamin.widawsky@intel.com, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky
> <benjamin.widawsky@intel.com <mailto:benjamin.widawsky@intel.com>> wrote:
>
>     Signed-off-by: Ben Widawsky <ben@bwidawsk.net <mailto:ben@bwidawsk.net>>
>     ---
>       drivers/gpu/drm/i915/intel_pm.c | 2 +-
>       1 file changed, 1 insertion(+), 1 deletion(-)
>
>     diff --git a/drivers/gpu/drm/i915/intel_pm.c
>     b/drivers/gpu/drm/i915/intel_pm.c
>     index 34cc898..deaaaf2 100644
>     --- a/drivers/gpu/drm/i915/intel_pm.c
>     +++ b/drivers/gpu/drm/i915/intel_pm.c
>     @@ -3016,7 +3016,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
>
>              gen6_set_rps_thresholds(dev_priv, val);
>
>     -       if (IS_HASWELL(dev))
>     +       if (IS_HASWELL(dev) || IS_BROADWELL(dev))
>                      I915_WRITE(GEN6_RPNSWREQ,
>                                 HSW_FREQUENCY(val));
>              else
>     --
>     1.8.5.3
>
>     _______________________________________________
>     Intel-gfx mailing list
>     Intel-gfx@lists.freedesktop.org <mailto:Intel-gfx@lists.freedesktop.org>
>     http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Looks fine

Reviewed-by: Deepak S <deepak.s@intel.com>