From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [PATCH] drm/i915: Add more registers to the whitelist for mesa Date: Wed, 09 Apr 2014 09:22:19 -0700 Message-ID: <534573BB.2090009@whitecape.org> References: <1396991938-6673-1-git-send-email-bradley.d.volkin@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1197044461==" Return-path: Received: from homiemail-a4.g.dreamhost.com (homie.mail.dreamhost.com [208.97.132.208]) by gabe.freedesktop.org (Postfix) with ESMTP id D52F56E072 for ; Wed, 9 Apr 2014 09:21:44 -0700 (PDT) In-Reply-To: <1396991938-6673-1-git-send-email-bradley.d.volkin@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: bradley.d.volkin@intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --===============1197044461== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Stw52pE6VtvHM9pNJ4NrFaBa3LlREaPTF" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --Stw52pE6VtvHM9pNJ4NrFaBa3LlREaPTF Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On 04/08/2014 02:18 PM, bradley.d.volkin@intel.com wrote: > From: Brad Volkin >=20 > These are additional registers needed for performance monitoring and > ARB_draw_indirect extensions in mesa. Whoops...I totally missed this. Thanks! > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D76719 > Cc: Kenneth Graunke > Signed-off-by: Brad Volkin > --- > drivers/gpu/drm/i915/i915_cmd_parser.c | 9 +++++++++ > drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++ > 2 files changed, 17 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i= 915/i915_cmd_parser.c > index 29184d6..3486ef7 100644 > --- a/drivers/gpu/drm/i915/i915_cmd_parser.c > +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c > @@ -408,10 +408,19 @@ static const u32 gen7_render_regs[] =3D { > REG64(PS_INVOCATION_COUNT), > REG64(PS_DEPTH_COUNT), > OACONTROL, /* Only allowed for LRI and SRM. See below. */ It would be great to add: GEN7_3DPRIM_END_OFFSET, which is the other ARB_draw_indirect register. I have no idea why we don't use it - sure seems like we should... > + GEN7_3DPRIM_START_VERTEX, > + GEN7_3DPRIM_VERTEX_COUNT, > + GEN7_3DPRIM_INSTANCE_COUNT, > + GEN7_3DPRIM_START_INSTANCE, > + GEN7_3DPRIM_BASE_VERTEX, > REG64(GEN7_SO_NUM_PRIMS_WRITTEN(0)), > REG64(GEN7_SO_NUM_PRIMS_WRITTEN(1)), > REG64(GEN7_SO_NUM_PRIMS_WRITTEN(2)), > REG64(GEN7_SO_NUM_PRIMS_WRITTEN(3)), > + REG64(GEN7_SO_PRIM_STORAGE_NEEDED(0)), > + REG64(GEN7_SO_PRIM_STORAGE_NEEDED(1)), > + REG64(GEN7_SO_PRIM_STORAGE_NEEDED(2)), > + REG64(GEN7_SO_PRIM_STORAGE_NEEDED(3)), FWIW, I don't think we actually need to write these...we just read them. Though, there's not much harm in it. > GEN7_SO_WRITE_OFFSET(0), > GEN7_SO_WRITE_OFFSET(1), > GEN7_SO_WRITE_OFFSET(2), > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i91= 5_reg.h > index 8e60737..533ec0a 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -427,6 +427,14 @@ > /* There are the 4 64-bit counter registers, one for each stream outpu= t */ > #define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8) > =20 > +#define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8) > + #define GEN7_3DPRIM_END_OFFSET 0x2420 > +#define GEN7_3DPRIM_START_VERTEX 0x2430 > +#define GEN7_3DPRIM_VERTEX_COUNT 0x2434 > +#define GEN7_3DPRIM_INSTANCE_COUNT 0x2438 > +#define GEN7_3DPRIM_START_INSTANCE 0x243C > +#define GEN7_3DPRIM_BASE_VERTEX 0x2440 > + > #define OACONTROL 0x2360 > =20 > #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 With END_OFFSET added, this would get a: Reviewed-by: Kenneth Graunke --Stw52pE6VtvHM9pNJ4NrFaBa3LlREaPTF Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAEBAgAGBQJTRXO/AAoJEFtb2gcdScw4OVgQAJ+oXrX5QnUYqNgYpb+UBdBS ueTHSQ4Br1XuoTg8lvb9DsSQyRT4RCaOENZdMHRK39oqQqJyYGbSyKn3OS0g6jGl vUM4t/eq9c9wxDk8gpjeCseMU4aTq6RxYWbtB3BbMhfQtHo2oY5K3rpBiUNjM4c1 oBzbJxyScpEQZbwkERw47hGRElx1OieZiE3wNBMQsFbN1d9Y3N6zoWqBJulFioNb heUMBb9cRkCNGUkUq6qhZObiTWNgpvUYbUvu0QFx3l8/KvUnW03X4mtpv7EZIRNf fj0F7FWaFk/QEU47uL7HXAvlaZc8zz6Ki8Qh40wYg1uS0DEXoedzzy0RJVZizFHA v5sQt/CI+mnLXBAJ2utZj3jrChHc4WfyLF+Yj6BFgCRbLV5KoLO7QEyN//OMW9yE uPuMp5No1HdD/1s4o1BlW05kParflJQPOSz73fYhMYZe9UIljwJI8FSECw6ARqre sCSsIsxZen2XrtGJolwwsLjpLcB7MxnFdZRKVscBZ5MEv16AUsR3KOvm2o9b+8sV s4Elic5LJo/N3GA7tJX0LhBU2JTYWMKse9p6o/kBWe2YN5fBaeU9TYJ39AdeL810 fr1YKuPKCjXF5HO89Oz8DIb9KqHRNN3MOWskz3X9gSbV0mceKmo33fsn6joN0y/i y8SaILCk4QHSm50eEhtz =aO8W -----END PGP SIGNATURE----- --Stw52pE6VtvHM9pNJ4NrFaBa3LlREaPTF-- --===============1197044461== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1197044461==--