Re: [PATCH 27/71] drm/i915/chv: Enable Render Standby (RC6) for Cheeryview

Chris Wilson
2014-04-10T16:03:59Z

On Wed, Apr 09, 2014 at 01:28:25PM +0300, ville.syrjala@linux.intel.com wrote:
> +static void cherryview_setup_pctx(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + unsigned long pctx_paddr;
> + struct i915_gtt *gtt = &dev_priv->gtt;
> + u32 pcbr;
> + int pctx_size = 32*1024;
> +
> + pcbr = I915_READ(VLV_PCBR);
> + if (pcbr >> 12 == 0) {
> + /*
> + * From the Gunit register HAS:
> + * The Gfx driver is expected to program this register and ensure
> + * proper allocation within Gfx stolen memory. For example, this
> + * register should be programmed such than the PCBR range does not
> + * overlap with other relevant ranges.
> + */
> + pctx_paddr = (dev_priv->mm.stolen_base + gtt->stolen_size - pctx_size);

Erm. Isn't the comment missing a FIXME? After all it explains exactly
what you are doing wrong here.
-Chris

--
Chris Wilson, Intel Open Source Technology Centre