From mboxrd@z Thu Jan 1 00:00:00 1970 From: "S, Deepak" Subject: Re: [PATCH 00/71] drm/i915/chv: Add Cherryview support Date: Tue, 15 Apr 2014 21:19:27 +0530 Message-ID: <534D5507.7070705@intel.com> References: <1397039349-10639-1-git-send-email-ville.syrjala@linux.intel.com> <20140409132516.GN18465@intel.com> <20140409150527.GQ18465@intel.com> <20140409165338.GC9262@phenom.ffwll.local> <53459BAA.2050608@intel.com> <20140409200043.GE9262@phenom.ffwll.local> <534617A3.2000401@intel.com> <20140410125938.GY18465@intel.com> <87y4zdwbd5.fsf@intel.com> <20140410140435.GZ18465@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id E7DE86E913 for ; Tue, 15 Apr 2014 08:49:34 -0700 (PDT) In-Reply-To: <20140410140435.GZ18465@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?ISO-8859-1?Q?Ville_Syrj=E4l=E4?= , Jani Nikula Cc: "intel-gfx@lists.freedesktop.org" List-Id: intel-gfx@lists.freedesktop.org On 4/10/2014 7:34 PM, Ville Syrj=E4l=E4 wrote: > On Thu, Apr 10, 2014 at 04:41:10PM +0300, Jani Nikula wrote: >> On Thu, 10 Apr 2014, Ville Syrj=E4l=E4 w= rote: >>> On Thu, Apr 10, 2014 at 09:31:39AM +0530, S, Deepak wrote: >>>> >>>> >>>> On 4/10/2014 1:30 AM, Daniel Vetter wrote: >>>>> On Thu, Apr 10, 2014 at 12:42:42AM +0530, S, Deepak wrote: >>>>>> >>>>>> >>>>>> On 4/9/2014 10:23 PM, Daniel Vetter wrote: >>>>>>> On Wed, Apr 09, 2014 at 06:05:27PM +0300, Ville Syrj=E4l=E4 wrote: >>>>>>>> On Wed, Apr 09, 2014 at 02:30:52PM +0000, S, Deepak wrote: >>>>>>>>> Hi Ville, >>>>>>>>> >>>>>>>>> I am Ok with cleaning up and pushing the Code. Can you please te= ll me >>>>>>>>> when we need to start pushing the code and branch to use >>>>>>>>> (drm-intel-next)? >>>>>>>> >>>>>>>> Well you can consider it pushed now that it's in the open. The pat= ches >>>>>>>> just need a bit of extra polish I think. Well, unless you're plann= ing >>>>>>>> a full blown rewrite of the code ;) >>>>>>>> >>>>>>>> I guess you need to take into consideration whatever bdw rc6/rps p= atches >>>>>>>> are still in flight, but since you've been doing some review there= I >>>>>>>> think you have a better idea than I do how things are progressing. >>>>>>>> >>>>>>>> I always work on top of nightly, so I guess that's a good choice :) >>>>>>> >>>>>>> Yes, -nightly is always the recommended branch to base upstream pat= ches >>>>>>> on. I'll sort out the conflict mess (or well, try to) if it doesn't= apply >>>>>>> to plain dinq or some other branch. drm-intel-next tends to be too >>>>>>> outdated ;-) >>>>>>> -Daniel >>>>>> >>>>>> Hi Daniel/Ville. >>>>>> >>>>>> Some of the patches are lined up for squashing right? So you want me >>>>>> to work on this patches to align to upstream code and resubmit it to >>>>>> same email thread? >>>>> >>>>> Hm, I expect this chv thread to become a bit mess really quickly tbh = ;-) >>>>> And since we don't have chv merged yet there's not really a baseline = to do >>>>> this on top. >>>>> >>>>> I guess the simplest approach would be for you to grab ville's chv tr= ee, >>>>> squash in the patches as discussed and then just starting on polishing >>>>> your chv patches. Then as I pull in patches from this series you can = drop >>>>> them from yours. A bit messy, but I don't see any other approach real= ly. >>>>> >>>>> Note that a pile of people are signed up to review this, so maybe hol= d off >>>>> a bit until the review for your patches have been done. >>>>> -Daniel >>>> >>>> Thanks Daniel. >>>> Ville can you please share your chv tree details? >>> >>> I rebased the lot and pushed here: >>> git://gitorious.org/vsyrjala/linux.git chv_rebase >> >> /me being lazy, did you squash/reorder patches, i.e. do the patch # >> assignments [1] for review still apply? > > The numbers would get shifted around a bit due to two these two patches > already getting merged: > drm/i915/chv: IS_BROADWELL() should not be true for Cherryview > drm/i915/chv: Add IS_CHERRYVIEW() macro > > And this patch got dropped as it no longer applies: > drm/i915/chv: Add plane C support > > Apart from that no reordering/squashing. > >> >> Jani. >> >> >> [1] http://mid.gmane.org/20140410110857.GW18465@intel.com >> >>> >>> -- >>> Ville Syrj=E4l=E4 >>> Intel OTC >>> _______________________________________________ >>> Intel-gfx mailing list >>> Intel-gfx@lists.freedesktop.org >>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx >> >> -- >> Jani Nikula, Intel Open Source Technology Center Hi Ville, Have you already squashed some of the RC6/turbo patches? Or you want me = to do it as part of RC6/RPS rework patches submission. Thanks Deepak