From mboxrd@z Thu Jan 1 00:00:00 1970 From: Deepak S Subject: Re: [PATCH 00/10] Enable RC6/Turbo on CHV Date: Wed, 23 Apr 2014 10:39:01 +0530 Message-ID: <53574AED.7080501@linux.intel.com> References: <1398066790-7489-1-git-send-email-deepak.s@linux.intel.com> <5355241E.5090406@linux.intel.com> <20140422201910.GK10722@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 607DB6E5F9 for ; Tue, 22 Apr 2014 22:09:05 -0700 (PDT) In-Reply-To: <20140422201910.GK10722@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wednesday 23 April 2014 01:49 AM, Daniel Vetter wrote: > On Mon, Apr 21, 2014 at 07:28:54PM +0530, Deepak S wrote: >> Hi Ville, >> >> let me know if you want some of other small patches to be squashed. > Quick aside: Something seems to have gone with git send-email thread - the > patches aren't in-reply-to the cover letter. No idea how that happened > though ... > -Daniel Not Sure :( I can resend the patches again >> Thanks >> Deepak >> >> >> On Monday 21 April 2014 01:23 PM, deepak.s@linux.intel.com wrote: >>> From: Deepak S >>> >>> Squashed some of the patches and created a new patch series. >>> >>> ToDo: Address the comments on some the patches. Changes will be shared = in next series. >>> >>> Ben Widawsky (1): >>> drm/i915/bdw: Implement a basic PM interrupt handler >>> >>> Deepak S (6): >>> drm/i915: Enable PM Interrupts target via Display Interface. >>> drm/i915/chv: Enable Render Standby (RC6) for Cheeryview >>> drm/i915/chv: Added CHV specific register read and write >>> drm/i915/chv: Enable RPS (Turbo) for Cheeryview >>> drm/i915/chv: Added CHV specific DDR fetch into init_clock_gating >>> drm/i915/chv: Freq(opcode) request value for CHV. >>> >>> Ville Syrj=E4l=E4 (3): >>> drm/i915/chv: Streamline CHV forcewake stuff >>> drm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0 >>> drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV >>> >>> drivers/gpu/drm/i915/i915_drv.h | 10 ++ >>> drivers/gpu/drm/i915/i915_irq.c | 79 +++++++++++- >>> drivers/gpu/drm/i915/i915_reg.h | 13 ++ >>> drivers/gpu/drm/i915/intel_drv.h | 2 + >>> drivers/gpu/drm/i915/intel_pm.c | 231 +++++++++++++++++++++++++= ++++++++- >>> drivers/gpu/drm/i915/intel_sideband.c | 15 +++ >>> drivers/gpu/drm/i915/intel_uncore.c | 126 +++++++++++++++++-- >>> 7 files changed, 455 insertions(+), 21 deletions(-) >>> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx