From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Richter Subject: Re: [PATCH] drm/i915: Init important ns2501 registers Date: Tue, 10 Jun 2014 00:29:20 +0200 Message-ID: <53963540.9000304@math.tu-berlin.de> References: <5395FFD4.9010302@math.tu-berlin.de> <28223_1402343538_53961072_28223_7661_1_1402343204-28608-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------080401050306070906040701" Return-path: Received: from medousa.rus.uni-stuttgart.de (medousa.rus.uni-stuttgart.de [129.69.192.4]) by gabe.freedesktop.org (Postfix) with ESMTP id B31AF6E1A6 for ; Mon, 9 Jun 2014 15:29:29 -0700 (PDT) In-Reply-To: <28223_1402343538_53961072_28223_7661_1_1402343204-28608-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org This is a multi-part message in MIME format. --------------080401050306070906040701 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Ville, thanks for the latest patch. As said, the screen did not come back quite correctly. I checked the register values again, and I am sorry to say that I was wrong - register values do differ. Apparently, the code configures now the wrong pipe to generate output to the DVO and thus the DVO does not seem to synchronize correctly anymore. Please find the two register dumps attached. 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