From mboxrd@z Thu Jan 1 00:00:00 1970 From: Abdiel Janulgue Subject: Re: drm/i915/bdw: Enable resource streamer on Broadwell Date: Wed, 11 Jun 2014 15:28:31 -0700 Message-ID: <5398D80F.6090807@linux.intel.com> References: <1399404306-26834-1-git-send-email-abdiel.janulgue@linux.intel.com> <20140611111010.66c1f01f@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 006816E1CC for ; Wed, 11 Jun 2014 15:28:31 -0700 (PDT) In-Reply-To: <20140611111010.66c1f01f@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 11.06.2014 11:10, Jesse Barnes wrote: > On Tue, 6 May 2014 22:25:04 +0300 > Abdiel Janulgue wrote: > >> From: Abdiel Janulgue >> >> This is a re-spin of my resource streamer patchset from October >> adapted to enable the feature on Broadwell instead. >> >> The resource streamer is a hw-feature that helps in reducing commands >> being submitted by the CPU. Haswell initially has this feature. >> Unfortunately, HSW seems to have problems switching between non-RS >> and RS-enabled commands[1]. On BDW however it works seamlessly >> as expected. >> >> The i-g-t test comes next on a separate patch-series. >> >> -- >> [1] http://lists.freedesktop.org/archives/intel-gfx/2014-May/044577.html >> >> Abdiel Janulgue (2): >> drm/i915/bdw: Enable resource streamer bits on MI_BATCH_BUFFER_START >> drm/i915/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag >> >> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 ++++++++ >> drivers/gpu/drm/i915/i915_reg.h | 1 + >> drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++- >> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + >> include/uapi/drm/i915_drm.h | 7 ++++++- >> 5 files changed, 18 insertions(+), 2 deletions(-) > These seem trivial enough... have you seen cases where you'd like to > enable it in Mesa? If so, it probably makes sense to merge this patch > so you can do your tuning and enabling on the Mesa side... I've had some Mesa patches since last year. Unfortunately, the changes didn't give any dramatic performance improvements. On the other hand, I admit: 1. I've only run it against GLBenchmark and Unigine benchmarks. Discussion with Portland folks seem to suggest that we need to have a comprehensive run with more benchmarks. 2. I only did the benchmarks in Haswell. Would be nice to see how it does on Broadwell. I agree though that further tuning of the performance needs to be done on the Mesa side.