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From: Steve Aarnio <steve.j.aarnio@linux.intel.com>
To: Jesse Barnes <jbarnes@virtuousgeek.org>, Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3
Date: Fri, 27 Jun 2014 09:15:25 -0700	[thread overview]
Message-ID: <53AD989D.2020408@linux.intel.com> (raw)
In-Reply-To: <20140611084113.4c1089af@jbarnes-desktop>

On 06/11/2014 08:41 AM, Jesse Barnes wrote:
> On Wed, 11 Jun 2014 17:39:29 +0200
> Daniel Vetter <daniel@ffwll.ch> wrote:
>
>> On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>>>> - If you have a machine which uses tiled framebuffers and enables
>>>>    swizzling in the BIOS your code will a) drop the swizzle setup in
>>>>    gem_init_hw, breaking resume b) not set the swizzle settings correctly
>>>>    in swizzle_detect, breaking swap in/out and pwrite/pread. Not sure such
>>>>    a machine exists, but still.
>>>
>>> This would affect krh's MBA, which is why I wanted testing here...
>>> anyway I'll spin a new one and ask krh to test again.
>>
>> Hm, I've thought the issue with the MBA is that it used tiled fbs, but
>> non-swizzled. And then a mess ensued when we've enabled it. But yeah,
>> unfortunately with the new logic we need to retest :(
>
> Ah yeah I think you're right, either way, need more testing.
>
> Maybe we should have just gone with the first patch to never enable
> swizzling based on Art's assertion that it didn't matter.
>

I hate to jump into the middle of a conversation that may or may not be related 
to a patch I just posted... but...

There was a very long internal discussion that the Windows guys had with H/W. 
For Gen8+ H/W recommends disabling CSX swizzle.  Technically, BDW still supports 
it, but there is a bug _somewhere_ that makes it problematic.  In any case it 
goes away for sure with Gen9+, so disabling on Gen8 doesn't hurt.

According to the other discussion, the H/W guys say that enabling actually hurts 
performance slightly, and the driver should leave the swizzle decisions to the 
memory controller.

Stevo

  reply	other threads:[~2014-06-27 16:15 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-05 18:24 [PATCH 1/5] drm/i915: preserve SSC if previously set v2 Jesse Barnes
2014-06-05 18:24 ` [PATCH 2/5] drm/i915: preserve swizzle settings if necessary v3 Jesse Barnes
2014-06-10 14:02   ` Daniel Vetter
2014-06-10 17:27     ` Jesse Barnes
2014-06-10 19:33       ` Daniel Vetter
2014-06-10 19:45         ` Jesse Barnes
2014-06-11  9:23           ` Daniel Vetter
2014-06-11 15:13             ` Jesse Barnes
2014-06-11 15:39               ` Daniel Vetter
2014-06-11 15:41                 ` Jesse Barnes
2014-06-27 16:15                   ` Steve Aarnio [this message]
2014-07-07  9:03                     ` [Intel-gfx] " Daniel Vetter
2014-06-05 18:24 ` [PATCH 3/5] drm: add drm_mode_same_size function Jesse Barnes
2014-06-05 18:24 ` [PATCH 4/5] drm/i915: use current mode if the size matches the preferred mode Jesse Barnes
2014-06-10 14:05   ` [Intel-gfx] " Daniel Vetter
2014-06-10 17:29     ` Jesse Barnes
2014-06-05 18:24 ` [PATCH 5/5] drm/i915: enable fastboot by default Jesse Barnes
2014-06-06 11:12   ` Jani Nikula
2014-06-10 14:10     ` Daniel Vetter
2014-06-10 14:07   ` [Intel-gfx] " Daniel Vetter
2014-06-10 17:31     ` Jesse Barnes
2014-06-10 18:01       ` Stéphane Marchesin
2014-06-10 18:42         ` [Intel-gfx] " Jesse Barnes
2014-06-11  9:30           ` Daniel Vetter
2014-06-06 11:04 ` [PATCH 1/5] drm/i915: preserve SSC if previously set v2 Jani Nikula
2014-06-06 11:06   ` Chris Wilson
2014-06-10 14:00 ` [Intel-gfx] " Daniel Vetter

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