Re: [PATCH 0/7] Future preparation patches

Damien Lespiau
2014-07-18T10:56:23Z

On Fri, Jul 18, 2014 at 11:04:03AM +0530, sonika.jindal@intel.com wrote:
> From: Sonika Jindal <sonika.jindal@intel.com>
>
> This series prepares future platform enabling by changing HAS_PCH_SPLIT to more
> appropriate check since the code accessed may not have anything to do with
> having PCH or not.

Hi Sonika,

HAS_PCH_SPLIT() is true for Ironlake (gen 5) as it's paired with the
Ibex Peak PCH.

In various patches, the condition needs to be INTEL_INFO(dev)->gen < 5
then.

--
Damien

> Sonika Jindal (7):
> drm/i915: Allowing changing of wm latencies for other valid platforms
> drm/i915: Returning the right VGA control reg for other platforms
> drm/i915: Setting legacy palette correctly for different platforms
> drm/i915: Returning from increase/decrease of pllclock when invalid
> drm/i915: Writing proper check for reading of pipe status reg
> drm/i915: Replace HAS_PCH_SPLIT which incorrectly lets some platforms
> in
> drm/i915: Avoid incorrect returning for some platforms
>
> drivers/gpu/drm/i915/i915_debugfs.c | 6 +++---
> drivers/gpu/drm/i915/i915_drv.h | 6 +++---
> drivers/gpu/drm/i915/intel_display.c | 8 ++++----
> drivers/gpu/drm/i915/intel_hdmi.c | 4 ++--
> 4 files changed, 12 insertions(+), 12 deletions(-)
>
> --
> 1.7.10.4
>
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