From: Deepak S <deepak.s@linux.intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>, ben@bwidawsk.net
Subject: Re: [PATCH] drm/i915/chv: Use timeout mode for RC6 on chv
Date: Tue, 22 Jul 2014 13:50:20 +0530 [thread overview]
Message-ID: <53CE1EC4.1030600@linux.intel.com> (raw)
In-Reply-To: <1405568787-20420-1-git-send-email-deepak.s@linux.intel.com>
On Thursday 17 July 2014 09:16 AM, deepak.s@linux.intel.com wrote:
> From: Deepak S <deepak.s@linux.intel.com>
>
> Higher RC6 residency is observed using timeout mode
> instead of EI mode. It's Recommended to use TO Method for RC6.
>
> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 19c5c26..88bad36 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4037,7 +4037,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
> I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
> I915_WRITE(GEN6_RC_SLEEP, 0);
>
> - I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
> + I915_WRITE(GEN6_RC6_THRESHOLD, 0x557);
>
> /* allows RC6 residency counter to work */
> I915_WRITE(VLV_COUNTER_CONTROL,
> @@ -4053,7 +4053,7 @@ static void cherryview_enable_rps(struct drm_device *dev)
> /* 3: Enable RC6 */
> if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) &&
> (pcbr >> VLV_PCBR_ADDR_SHIFT))
> - rc6_mode = GEN6_RC_CTL_EI_MODE(1);
> + rc6_mode = GEN7_RC_CTL_TO_MODE;
>
> I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
>
Hi Ben,
Please review the patch
Thanks
Deepak
next prev parent reply other threads:[~2014-07-21 8:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-17 3:46 [PATCH] drm/i915/chv: Use timeout mode for RC6 on chv deepak.s
2014-07-22 8:20 ` Deepak S [this message]
2014-07-21 17:12 ` Ben Widawsky
2014-07-23 6:30 ` Deepak S
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