From: "Siluvery, Arun" <arun.siluvery@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [RFC] drm/i915/bdw: Apply workarounds to the golden render state
Date: Fri, 08 Aug 2014 11:34:07 +0100 [thread overview]
Message-ID: <53E4A79F.5030106@linux.intel.com> (raw)
In-Reply-To: <20140808095730.GG3021@nuc-i3427.alporthouse.com>
On 08/08/2014 10:57, Chris Wilson wrote:
> On Fri, Aug 08, 2014 at 10:52:57AM +0100, arun.siluvery@linux.intel.com wrote:
>> From: Arun Siluvery <arun.siluvery@linux.intel.com>
>>
>> Workarounds for bdw are currently applied in init_clock_gating() but they
>> are lost following a gpu reset. Some of the registers are part of register
>> state context and they are restored with every context switch so initializing
>> WAs in golden render state ensures that they are applied even when we start
>> with an uninitialized context or during hw initialization followed by a reset.
>
> Interesting, but let's try to keep the opaque blobs minimal. The
> comments for w/a are even more valuable than the code.
I agree, I will add comments to each workaround.
We are looking at augmenting workarounds to the null batch in render
state setup function itself. Do you have any comments with that approach?
regards
Arun
> -Chris
>
next prev parent reply other threads:[~2014-08-08 10:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-08 9:52 [RFC] Add BDW workarounds to golden render state arun.siluvery
2014-08-08 9:52 ` [RFC] drm/i915/bdw: Apply workarounds to the " arun.siluvery
2014-08-08 9:57 ` Chris Wilson
2014-08-08 10:34 ` Siluvery, Arun [this message]
2014-08-08 10:39 ` Chris Wilson
2014-08-08 12:20 ` Ville Syrjälä
2014-08-08 13:11 ` Siluvery, Arun
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