From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Siluvery, Arun" Subject: Re: [RFC] drm/i915/bdw: Apply workarounds to the golden render state Date: Fri, 08 Aug 2014 11:34:07 +0100 Message-ID: <53E4A79F.5030106@linux.intel.com> References: <1407491577-31626-1-git-send-email-arun.siluvery@linux.intel.com> <1407491577-31626-2-git-send-email-arun.siluvery@linux.intel.com> <20140808095730.GG3021@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 5389A6E846 for ; Fri, 8 Aug 2014 03:34:10 -0700 (PDT) In-Reply-To: <20140808095730.GG3021@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 08/08/2014 10:57, Chris Wilson wrote: > On Fri, Aug 08, 2014 at 10:52:57AM +0100, arun.siluvery@linux.intel.com wrote: >> From: Arun Siluvery >> >> Workarounds for bdw are currently applied in init_clock_gating() but they >> are lost following a gpu reset. Some of the registers are part of register >> state context and they are restored with every context switch so initializing >> WAs in golden render state ensures that they are applied even when we start >> with an uninitialized context or during hw initialization followed by a reset. > > Interesting, but let's try to keep the opaque blobs minimal. The > comments for w/a are even more valuable than the code. I agree, I will add comments to each workaround. We are looking at augmenting workarounds to the null batch in render state setup function itself. Do you have any comments with that approach? regards Arun > -Chris >