From: Thomas Richter <richter@rus.uni-stuttgart.de>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org,
Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 11/16] drm/i915: Init important ns2501 registers
Date: Fri, 15 Aug 2014 15:18:00 +0200 [thread overview]
Message-ID: <53EE0888.3050503@rus.uni-stuttgart.de> (raw)
In-Reply-To: <1408054928-24141-12-git-send-email-ville.syrjala@linux.intel.com>
On 15.08.2014 00:22, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> In my earlier rewrite I missed a few important registers. Thomas Richter
> noticed that they're needed to make his machine resume correctly.
>
> Looks like IEGD does a one time init of these three registers. We don't
> have a good one time init place in the ns2501 driver, so let's just
> stick them into the .mode_set() hook and see if that helps things along.
Looks good to me.
Signed-off-by: Thomas Richter <richter@rus.uni-stuttgart.de>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/dvo_ns2501.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c
> index b278571..345235b 100644
> --- a/drivers/gpu/drm/i915/dvo_ns2501.c
> +++ b/drivers/gpu/drm/i915/dvo_ns2501.c
> @@ -342,6 +342,12 @@ static const struct ns2501_reg regs_1024x768[][86] = {
> },
> };
>
> +static const struct ns2501_reg regs_init[] = {
> + [0] = { .offset = 0x35, .value = 0xff, },
> + [1] = { .offset = 0x34, .value = 0x00, },
> + [2] = { .offset = 0x08, .value = 0x30, },
> +};
> +
> struct ns2501_priv {
> bool quiet;
> const struct ns2501_reg *regs;
> @@ -544,6 +550,10 @@ static void ns2501_mode_set(struct intel_dvo_device *dvo,
> else
> return;
>
> + /* Hopefully doing it every time won't hurt... */
> + for (i = 0; i < ARRAY_SIZE(regs_init); i++)
> + ns2501_writeb(dvo, regs_init[i].offset, regs_init[i].value);
> +
> ns->regs = regs_1024x768[mode_idx];
>
> for (i = 0; i < 84; i++)
>
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next prev parent reply other threads:[~2014-08-15 13:18 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-14 22:21 [PATCH 00/16] drm/i915: 830M/ns201 fixes again ville.syrjala
2014-08-14 22:21 ` [PATCH 01/16] drm/i915: Fix gen2 planes B and C max watermark value ville.syrjala
2014-08-15 13:25 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 02/16] drm/i915: Disable trickle feed for gen2/3 ville.syrjala
2014-08-14 22:21 ` [PATCH 03/16] drm/i915: Idle unused rings on gen2/3 during init/resume ville.syrjala
2014-08-14 22:21 ` [PATCH 04/16] drm/i915: Pass intel_crtc to intel_disable_pipe() and intel_wait_for_pipe_off() ville.syrjala
2014-08-15 13:27 ` Thomas Richter
2014-08-14 22:21 ` [PATCH v3 05/16] drm/i915: Disable double wide even when leaving the pipe on ville.syrjala
2014-08-15 13:28 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 06/16] drm/i915: ns2501 is on DVOB ville.syrjala
2014-08-15 13:29 ` Thomas Richter
2014-08-14 22:21 ` [PATCH 07/16] drm/i915: Enable DVO between mode_set and dpms hooks ville.syrjala
2014-08-15 13:29 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 08/16] drm/i915: Don't call DVO mode_set hook on DPMS changes ville.syrjala
2014-08-15 13:30 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 09/16] drm/i915: Kill useless ns2501_dump_regs ville.syrjala
2014-08-15 13:08 ` Thomas Richter
2014-08-15 13:31 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 10/16] drm/i915: Rewrite ns2501 driver a bit ville.syrjala
2014-08-15 13:13 ` Thomas Richter
2014-08-15 13:32 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 11/16] drm/i915: Init important ns2501 registers ville.syrjala
2014-08-15 13:18 ` Thomas Richter [this message]
2014-08-15 13:33 ` Thomas Richter
2014-09-01 8:42 ` Daniel Vetter
2014-08-14 22:22 ` [PATCH 12/16] drm/i915: Check pixel clock in ns2501 mode_valid hook ville.syrjala
2014-08-15 13:19 ` Thomas Richter
2014-08-15 13:33 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 13/16] drm/i915: Fix DVO 2x clock enable on 830M ville.syrjala
2014-08-15 13:34 ` Thomas Richter
2014-09-01 8:46 ` Daniel Vetter
2014-09-05 18:52 ` [PATCH v2 " ville.syrjala
2014-09-08 7:33 ` Daniel Vetter
2014-08-14 22:22 ` [PATCH 14/16] Revert "drm/i915: Nuke pipe A quirk on i830M" ville.syrjala
2014-08-15 13:36 ` Thomas Richter
2014-08-14 22:22 ` [PATCH v2 15/16] drm/i915: Add pipe B force quirk for 830M ville.syrjala
2014-08-15 13:37 ` Thomas Richter
2014-08-14 22:22 ` [PATCH 16/16] drm/i915: Preserve VGACNTR bits from the BIOS ville.syrjala
2014-08-15 13:39 ` Thomas Richter
2014-08-15 7:57 ` [PATCH 00/16] drm/i915: 830M/ns201 fixes again Ville Syrjälä
[not found] ` <53EE59E8.7030101@rus.uni-stuttgart.de>
[not found] ` <20140816181342.GU4193@intel.com>
2014-08-16 18:25 ` S6010 - brightness adjustment not available Thomas Richter
2014-08-16 20:34 ` Ville Syrjälä
2014-09-01 8:53 ` [PATCH 00/16] drm/i915: 830M/ns201 fixes again Daniel Vetter
2014-09-05 18:54 ` [PATCH] drm/i915: Limit the watermark to at least 8 entries on gen2/3 ville.syrjala
2014-09-05 19:03 ` Thomas Richter
2014-09-06 17:33 ` Ville Syrjälä
2014-09-06 17:50 ` Thomas Richter
2014-09-08 7:39 ` Daniel Vetter
2014-09-08 7:41 ` Thomas Richter
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