Re: [PATCH] drm/i915: Limit the watermark to at least 8 entries on gen2/3

Thomas Richter
2014-09-05T19:03:26Z

On 05.09.2014 20:54, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> 830 is very unhappy of the watermark value is too low (indicating a very
> high watermark in fact, ie. memory fetch will occur with an almost full
> FIFO). Limit the watermark value to at least 8 cache lines.
>
> That also matches the burst size we use on most platforms. BSpec seems
> to indicate we should limit the watermark to 'burst size + 1'. But on
> gen4 we already use a hardcoded 8 as the watermark value (as the spec
> says we should), so just use 8 as the limit on gen2/3 as well.

/* snip */

That's certainly one way to fix it. Nothing against it. It might be more
conservative to make this fix only in the calling context of the 830 and
845 specific functions as I don't know whether the other chipsets have
similar issues. I.e. one level up in the call-chain.

This being said, I can certainly confirm that the suggested modification
works on i830.

One way or another, it seems to me that drm-intel-nightly which I pulled
had a couple of more serious issues. I didn't even get X running, and
monitor detection did not seem to work reliable, too. I had the same
kind of instability on the external monitor for the console Ville's
patches fixed so nicely, so it seems to me that there is something else
that is missing. The new DVO code was definitely there, I checked that.

Thanks,
Thomas