From mboxrd@z Thu Jan 1 00:00:00 1970 From: Deepak S Subject: Re: [PATCH] drm/i915: Fix to Enable GT/PM Interrupts for cherryview. Date: Fri, 22 Aug 2014 07:43:14 +0530 Message-ID: <53F6A73A.8090906@linux.intel.com> References: <1408608429-27991-1-git-send-email-deepak.s@linux.intel.com> <20140820105616.GE4193@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 372D46E211 for ; Wed, 20 Aug 2014 19:18:14 -0700 (PDT) In-Reply-To: <20140820105616.GE4193@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?windows-1252?Q?Ville_Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wednesday 20 August 2014 04:26 PM, Ville Syrj=E4l=E4 wrote: > On Thu, Aug 21, 2014 at 01:37:09PM +0530, deepak.s@linux.intel.com wrote: >> From: Deepak S >> >> Programing GT IER interrupts was fumbled while enabling Interrupts for >> gen8 > True, but... > >> This is a regression from >> commit abd58f0175915bed644aa67c8f69dc571b8280e0 >> Author: Ben Widawsky >> Date: Sat Nov 2 21:07:09 2013 -0700 >> >> drm/i915/bdw: Implement interrupt changes >> >> Signed-off-by: Deepak S >> --- >> drivers/gpu/drm/i915/i915_irq.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915= _irq.c >> index d5445e7..48c02bc 100644 >> --- a/drivers/gpu/drm/i915/i915_irq.c >> +++ b/drivers/gpu/drm/i915/i915_irq.c >> @@ -3812,7 +3812,7 @@ static void gen8_gt_irq_postinstall(struct drm_i91= 5_private *dev_priv) >> GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT | >> GT_RENDER_USER_INTERRUPT << GEN8_VCS2_IRQ_SHIFT | >> GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS2_IRQ_SHIFT, >> - 0, >> + dev_priv->pm_rps_events, > .. this would now unmask the rps interrupts already in postinstall which > isn't quite what we want. I think the best solution might be to just > kill the loop below and just init each GT interrupt register set indivual= ly > so that you can pass the correct mask to GT_IMR(2). So I'm thinking simply > something like this: > > dev_priv->pm_irq_mask =3D 0xffffffff; > GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); > GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); > GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events); > GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); Thanks for the review. I will address this. >> GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT | >> GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT >> }; >> -- = >> 1.9.1