From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jike Song Subject: Re: [PATCH 8/8] drm/i915: Support alias ppgtt in VM if ppgtt is enabled Date: Mon, 22 Sep 2014 19:17:41 +0800 Message-ID: <54200555.4050008@intel.com> References: <1411152428-7226-1-git-send-email-jike.song@intel.com> <1411152428-7226-9-git-send-email-jike.song@intel.com> <20140919082539.GG21738@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 765C06E143 for ; Mon, 22 Sep 2014 04:21:37 -0700 (PDT) In-Reply-To: <20140919082539.GG21738@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 09/19/2014 04:25 PM, Chris Wilson wrote: > > This should be moved to sanitize_enable_ppgtt(), probably by expanding > HAS_PPGTT(), e.g.: > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 07dafa2c2d8c..b1fa13942d14 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2139,8 +2139,6 @@ struct drm_i915_cmd_table { > > #define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8) > -#define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >= 6) > -#define HAS_PPGTT(dev) (INTEL_INFO(dev)->gen >= 7 && !IS_GEN8(dev)) > #define USES_PPGTT(dev) (i915.enable_ppgtt) > #define USES_FULL_PPGTT(dev) (i915.enable_ppgtt == 2) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index a234446a8678..3bea0bdfd276 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -35,13 +35,23 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv); > > static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) > { > - if (enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev)) > + bool has_aliasing_ppgtt; > + bool has_full_ppgtt; > + > + has_aliasing_ppgtt = INTEL_INFO(dev)->gen >= 6; > + has_full_ppgtt = INTEL_INFO(dev)->gen >= 7; > + if (IS_GEN8(dev)) > + has_full_ppgtt = false; /* XXX why? */ > + if (intel_vgpu_active(dev)) > + has_full_ppgtt = false; /* emulation is too hard */ > + > + if (enable_ppgtt == 0 || !has_aliasing_ppgtt) > return 0; > > if (enable_ppgtt == 1) > return 1; > > - if (enable_ppgtt == 2 && HAS_PPGTT(dev)) > + if (enable_ppgtt == 2 && has_full_ppgtt) > return 2; > > #ifdef CONFIG_INTEL_IOMMU > @@ -59,7 +69,7 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) > return 0; > } > > - return HAS_PPGTT(dev) ? 2 : HAS_ALIASING_PPGTT(dev) ? 1 : 0; > + return has_full_ppgtt ? 2 : has_aliasing_ppgtt ? 1 : 0; > } Thanks for the demo. Currently sanitize_enable_ppgtt() is called by i915_gem_gtt_init(), before intel_check_vgpu(). I'm trying to detect VGPU as early as possible, maybe between intel_detect_pch() and intel_uncore_init(), using bare readq/readw instead of I915_READxx. > > -Chris > -- Thanks, Jike