From mboxrd@z Thu Jan 1 00:00:00 1970 From: Clint Taylor Subject: Re: [PATCH v2] drm/i915: Audio N value computed for pixel doubled modes Date: Mon, 13 Oct 2014 16:46:39 -0700 Message-ID: <543C645F.9060000@intel.com> References: <1411598116-4190-1-git-send-email-clinton.a.taylor@intel.com> <1411662396-10935-1-git-send-email-clinton.a.taylor@intel.com> <20140926162853.GB32511@intel.com> <5433114A.1010001@intel.com> <20141007085213.GR32511@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id B946389CC9 for ; Mon, 13 Oct 2014 16:47:54 -0700 (PDT) In-Reply-To: <20141007085213.GR32511@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?windows-1252?Q?Ville_Syrj=E4l=E4?= Cc: Intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 10/07/2014 01:52 AM, Ville Syrj=E4l=E4 wrote: > On Mon, Oct 06, 2014 at 03:01:46PM -0700, Clint Taylor wrote: >> On 09/26/2014 09:28 AM, Ville Syrj=E4l=E4 wrote: >>> On Thu, Sep 25, 2014 at 09:26:36AM -0700, clinton.a.taylor@intel.com wr= ote: >>>> From: Clint Taylor >>>> >>>> HDMI audio clock config was incorrectly choosing the default for >>>> pixel doubled interlaced modes. The table was missing pixel clock >>>> values 13.500 (27.000) and 13.513 (27.027). Luckily the default N >>>> value for 25.200 is the same N value for both 27MHz pixel clocks, >>>> a warning message was being printed with drm.debug set. >>>> >>>> ver2: Use 13500 * 1001 / 1000 instead of 13513 constant. >>>> >>>> Cc: Jani Nikula >>>> >>>> Signed-off-by: Clint Taylor >>>> --- >>>> drivers/gpu/drm/i915/intel_display.c | 2 ++ >>>> 1 file changed, 2 insertions(+) >>>> >>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i9= 15/intel_display.c >>>> index 858011d..e76a4106 100644 >>>> --- a/drivers/gpu/drm/i915/intel_display.c >>>> +++ b/drivers/gpu/drm/i915/intel_display.c >>>> @@ -7872,6 +7872,8 @@ static struct { >>>> { 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 }, >>>> { DIV_ROUND_UP(148500 * 1000, 1001), AUD_CONFIG_PIXEL_CLOCK_HDMI_1= 48352 }, >>>> { 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 }, >>>> + { 13500, AUD_CONFIG_PIXEL_CLOCK_HDMI_27000 }, >>>> + { 13500 * 1001 / 1000, AUD_CONFIG_PIXEL_CLOCK_HDMI_27027 }, >>> >>> We have double clocked modes where the non-doubled clock is already >>> 27MHz so this seems like a bandaid for one particular case rather than a >>> full solution. >>> >>> The HDMI specification makes it clear that the N/CTS stuff depends on >>> the TMDS clock and not the pixel clock, but BSpec just talks about pixel >>> clock without further explaining any of this stuff. So should we look >>> at port_clock rather than the pixel clock here? >> >> No, Since we support 12bpc we still need to only worry about the pixel >> clock. TMDS clock and port clock will be multiplied by 1.5 in 12bpc >> mode, but the N value remains the same as the 8bpc clock. > > Does the hardware then have two different N value tables and it picks > one based on 8bpc vs. 12bpc? Also I'm not sure what happens with > different audio sample rates, but maybe we only support 48kHz? Sadly > the spec is quite lacking when it comes to the audio side. > The BSPEC also contains manual n/cts registers for non CEA modes. = Hopefully the HW automatically selects 12bpc N values. The HW does = select 8bpc other sample rates, so 12bpc 32 and 44.1 "should" work. > The recommended N values in the HDMI spec do differ somewhat between > 8bpc and 12bpc, so either we end up using a non-recommended N value > in 12bpc, or the hardware does some extra magic. > Just saw Appendix D in the HDMI spec..