From: Todd Previte <tprevite@gmail.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/17] drm/i915: Wait for PHY port ready before link training on VLV/CHV
Date: Wed, 22 Oct 2014 08:10:40 -0700 [thread overview]
Message-ID: <5447C8F0.5000704@gmail.com> (raw)
In-Reply-To: <1413484055-20669-9-git-send-email-ville.syrjala@linux.intel.com>
On 10/16/2014 11:27 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> There's no point in checking if the data lanes came out of reset after
> link training. If the data lanes aren't ready link training will fail
> anyway.
>
> Suggested-by: Todd Previte <tprevite@gmail.com>
> Cc: Todd Previte <tprevite@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> If Todd has a better patch with better description we can use that one
> instead of my version. But at least I think the spot where I put the
> vlv_wait_port_ready() is the right one. We could perhaps skip the link
> training attempt entirely if the port is already stuck.
>
> drivers/gpu/drm/i915/intel_dp.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 4c8f169..6f568b4 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2550,6 +2550,9 @@ static void intel_enable_dp(struct intel_encoder *encoder)
>
> pps_unlock(intel_dp);
>
> + if (IS_VALLEYVIEW(dev))
> + vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp));
> +
> intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> intel_dp_start_link_train(intel_dp);
> intel_dp_complete_link_train(intel_dp);
> @@ -2689,8 +2692,6 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder)
> mutex_unlock(&dev_priv->dpio_lock);
>
> intel_enable_dp(encoder);
> -
> - vlv_wait_port_ready(dev_priv, dport);
> }
>
> static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder)
> @@ -2783,8 +2784,6 @@ static void chv_pre_enable_dp(struct intel_encoder *encoder)
> mutex_unlock(&dev_priv->dpio_lock);
>
> intel_enable_dp(encoder);
> -
> - vlv_wait_port_ready(dev_priv, dport);
> }
>
> static void chv_dp_pre_pll_enable(struct intel_encoder *encoder)
We should definitely skip link training if the PHYs are down. There's
going to be a WARN when wait_port_ready() fails so we'll be well aware
that something went wrong. Spamming dmesg with errors/WARNs from trying
to train the link after that is really counterproductive, since we
already know there's no way link training could succeed.
-T
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-10-22 15:10 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-16 18:27 [PATCH 00/17] drm/i915: Fix vlv/chv panel power sequencer ville.syrjala
2014-10-16 18:27 ` [PATCH 01/17] drm/i915: Warn if trying to register eDP on port != B/C on vlv/chv ville.syrjala
2014-10-17 9:47 ` Jani Nikula
2014-10-17 11:28 ` Ville Syrjälä
2014-10-17 17:26 ` Mika Kuoppala
2014-10-21 15:42 ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 02/17] drm/i915: Warn if stealing power sequencer from an active eDP port ville.syrjala
2014-10-28 8:10 ` Daniel Vetter
2014-10-28 8:14 ` Ville Syrjälä
2014-10-28 8:34 ` Daniel Vetter
2014-10-28 9:07 ` Ville Syrjälä
2014-10-28 10:30 ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 03/17] drm/i915: Remove high level intel_edp_vdd_{on, off}() from hpd/detect ville.syrjala
2014-10-16 18:27 ` [PATCH 04/17] drm/i915: Store power sequencer delays in intel_dp ville.syrjala
2014-10-16 18:27 ` [PATCH 05/17] drm/i915: Don't initialize power seqeuencer delays more than once ville.syrjala
2014-10-27 14:43 ` Imre Deak
2014-10-27 14:55 ` Ville Syrjälä
2014-10-28 8:12 ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 06/17] drm/i915: Split power sequencer panel on/off functions to locked and unlocked variants ville.syrjala
2014-10-16 18:27 ` [PATCH 07/17] drm/i915: Hold the pps mutex across the whole panel power enable sequence ville.syrjala
2014-10-16 18:27 ` [PATCH 08/17] drm/i915: Wait for PHY port ready before link training on VLV/CHV ville.syrjala
2014-10-22 15:10 ` Todd Previte [this message]
2014-10-28 8:15 ` Daniel Vetter
2014-11-04 21:58 ` Todd Previte
2014-10-16 18:27 ` [PATCH 09/17] drm/i915: Fix eDP link training when switching pipes " ville.syrjala
2014-10-16 18:29 ` [PATCH 10/17] drm/i915: Kick the power sequencer before AUX transactions ville.syrjala
2014-10-16 18:29 ` [PATCH 11/17] drm/i915: Make sure DPLL is enabled when kicking the power sequencer on VLV/CHV ville.syrjala
2014-10-28 8:22 ` Daniel Vetter
2014-10-28 8:27 ` Ville Syrjälä
2014-10-28 8:55 ` [PATCH v2 " ville.syrjala
2014-10-28 11:20 ` [PATCH v3 " ville.syrjala
2014-10-16 18:29 ` [PATCH 12/17] drm/i915: Don't kick the power seqeuncer just to check if we have vdd/panel power ville.syrjala
2014-10-27 17:10 ` Imre Deak
2014-10-28 8:03 ` Ville Syrjälä
2014-10-28 8:07 ` Daniel Vetter
2014-10-28 8:26 ` Daniel Vetter
2014-10-16 18:29 ` [PATCH 13/17] drm/i915: Clear PPS port select when giving up the power sequencer ville.syrjala
2014-10-16 18:29 ` [PATCH 14/17] drm/i915: Warn if stealing non pipe A/B " ville.syrjala
2014-10-16 18:29 ` [PATCH 15/17] drm/i915: Steal power sequencer in vlv_power_sequencer_pipe() ville.syrjala
2014-10-28 8:30 ` Daniel Vetter
2014-10-16 18:30 ` [PATCH 16/17] drm/i915: Improve VDD/PPS debugs ville.syrjala
2014-10-16 18:30 ` [PATCH 17/17] drm/i915: Warn if panel power is already on when enabling it ville.syrjala
2014-10-27 17:56 ` [PATCH 00/17] drm/i915: Fix vlv/chv panel power sequencer Imre Deak
2014-10-28 8:32 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5447C8F0.5000704@gmail.com \
--to=tprevite@gmail.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox