From: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com,
shuang.he@linux.intel.com
Subject: Re: [PATCH 4/9] drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs
Date: Tue, 04 Nov 2014 08:57:56 +0200 [thread overview]
Message-ID: <545878F4.6090002@intel.com> (raw)
In-Reply-To: <20141103135642.GG26941@phenom.ffwll.local>
On 11/03/2014 03:56 PM, Daniel Vetter wrote:
> On Mon, Nov 03, 2014 at 02:51:27PM +0100, Daniel Vetter wrote:
>> On Wed, Oct 29, 2014 at 11:32:33AM +0200, Ander Conselvan de Oliveira wrote:
>>> It is possible for a mode set to fail if there aren't shared DPLLS that
>>> match the new configuration requirement or other errors in clock
>>> computation. If that step is executed after disabling crtcs, in the
>>> failure case the hardware configuration is changed and needs to be
>>> restored. Doing those things early will allow the mode set to fail
>>> before actually touching the hardware.
>>>
>>> Follow up patches will convert different platforms to use the new
>>> infrastructure.
>>>
>>> v2: Keep pll->new_config valid only during mode set (Ville)
>>> Use kmemdup() in i915_shared_dpll_start_config() (Ville)
>>> Restore old pll config if something fails before commit (Ville)
>>> Don't set compute_clock hooks since dev_priv is kzalloc()'d (Ville)
>>>
>>> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
>>
>> Ran into a blocking question with this one, merged thus far.
>>
>>> @@ -7395,6 +7456,9 @@ static int ironlake_crtc_mode_set(struct intel_crtc *crtc,
>>> else
>>> crtc->new_config->dpll_hw_state.fp1 = fp;
>>>
>>> + if (intel_crtc_to_shared_dpll(crtc))
>>> + intel_put_shared_dpll(crtc);
>>
>> Don't we need the same fixup in intel_ddi_pll_select?
>
> Ok, I think I've figured it out - hsw does an unconditional put since a
> ddi pll might not be needed (for e.g. DP).
Yep, intel_ddi_pll_select() already had an unconditional call to
intel_put_shared_dpll(), while the ironlake code relied on them being
released in intel_get_shared_dpll(). After this patch the shared DPLLs
should be release by the caller before getting a new one, but a later
patch removes all those intel_put_shared_dpll() calls anyway.
Ander
---------------------------------------------------------------------
Intel Finland Oy
Registered Address: PL 281, 00181 Helsinki
Business Identity Code: 0357606 - 4
Domiciled in Helsinki
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-11-04 6:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-29 9:32 [PATCH v2 0/9] Stage shared dpll config Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 1/9] drm/i915: Make *_crtc_mode_set work on new_config Ander Conselvan de Oliveira
2014-11-03 13:45 ` Daniel Vetter
2014-10-29 9:32 ` [PATCH 2/9] drm/i915: Convert shared dpll reference count to a crtc mask Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 3/9] drm/i915: Move dpll crtc_mask and hw_state fields into separate struct Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 4/9] drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs Ander Conselvan de Oliveira
2014-11-03 13:51 ` Daniel Vetter
2014-11-03 13:56 ` Daniel Vetter
2014-11-04 6:57 ` Ander Conselvan de Oliveira [this message]
2014-10-29 9:32 ` [PATCH 5/9] drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 6/9] drm/i915: Covert ILK-IVB " Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 7/9] drm/i915: Covert remaining platforms " Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 8/9] drm/i915: Remove crtc_mode_set() hook Ander Conselvan de Oliveira
2014-10-29 9:32 ` [PATCH 9/9] drm/i915: Don't store current shared DPLL in the new pipe_config Ander Conselvan de Oliveira
2014-10-29 13:56 ` [PATCH 9/9] drm/i915: Don't store current shared DPLL shuang.he
2014-11-03 14:09 ` [PATCH v2 0/9] Stage shared dpll config Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=545878F4.6090002@intel.com \
--to=ander.conselvan.de.oliveira@intel.com \
--cc=daniel@ffwll.ch \
--cc=intel-gfx@lists.freedesktop.org \
--cc=shuang.he@linux.intel.com \
--cc=ville.syrjala@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox