[PATCH v5 0/7] Command parser batch buffer copy

[PATCH v5 0/7] Command parser batch buffer copy

[michael.h.nguyen]

From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>

This is v5 of the series sent here:
http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html

This version incorporates the following feedback from v4. 

- 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
  parser (danvet)
- 1/7 Move purged check inside the loop (danvet)
- 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
  fnc (danvet)
- 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)

Issue: VIZ-4719
Brad Volkin (7):
  drm/i915: Implement a framework for batch buffer pools
  drm/i915: Use batch pools with the command parser
  drm/i915: Add a batch pool debugfs file
  drm/i915: Add batch pool details to i915_gem_objects debugfs
  drm/i915: Use batch length instead of object size in command parser
  drm/i915: Mark shadow batch buffers as purgeable
  drm/i915: Tidy up execbuffer command parsing code

 Documentation/DocBook/drm.tmpl             |   5 +
 drivers/gpu/drm/i915/Makefile              |   1 +
 drivers/gpu/drm/i915/i915_cmd_parser.c     |  99 ++++++++++++++++---
 drivers/gpu/drm/i915/i915_debugfs.c        |  86 ++++++++++++++--
 drivers/gpu/drm/i915/i915_dma.c            |   1 +
 drivers/gpu/drm/i915/i915_drv.h            |  24 +++++
 drivers/gpu/drm/i915/i915_gem.c            |   3 +
 drivers/gpu/drm/i915/i915_gem_batch_pool.c | 154 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  99 +++++++++++++++----
 9 files changed, 430 insertions(+), 42 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c

-- 
1.9.1

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[PATCH v5 1/7] drm/i915: Implement a framework for batch buffer pools

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

This adds a small module for managing a pool of batch buffers.
The only current use case is for the command parser, as described
in the kerneldoc in the patch. The code is simple, but separating
it out makes it easier to change the underlying algorithms and to
extend to future use cases should they arise.

The interface is simple: init to create an empty pool, fini to
clean it up, get to obtain a new buffer. Note that all buffers are
expected to be inactive before cleaning up the pool.

Locking is currently based on the caller holding the struct_mutex.
We already do that in the places where we will use the batch pool
for the command parser.

v2:
- s/BUG_ON/WARN_ON/ for locking assertions
- Remove the cap on pool size
- Switch from alloc/free to init/fini

v3:
- Idiomatic looping structure in _fini
- Correct handling of purged objects
- Don't return a buffer that's too much larger than needed

v4:
- Rebased to latest -nightly

v5:
- Remove _put() function and clean up comments to match

v6:
- Move purged check inside the loop (danvet, from v4 1/7 feedback)

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 Documentation/DocBook/drm.tmpl             |   5 +
 drivers/gpu/drm/i915/Makefile              |   1 +
 drivers/gpu/drm/i915/i915_drv.h            |  15 +++
 drivers/gpu/drm/i915/i915_gem.c            |   1 +
 drivers/gpu/drm/i915/i915_gem_batch_pool.c | 152 +++++++++++++++++++++++++++++
 5 files changed, 174 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c

diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index 944e8ed..b5943d4 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -4028,6 +4028,11 @@ int num_ioctls;</synopsis>
 !Idrivers/gpu/drm/i915/i915_cmd_parser.c
       </sect2>
       <sect2>
+        <title>Batchbuffer Pools</title>
+!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
+!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
+      </sect2>
+      <sect2>
         <title>Logical Rings, Logical Ring Contexts and Execlists</title>
 !Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
 !Idrivers/gpu/drm/i915/intel_lrc.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e4083e4..c8dbb37d 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -19,6 +19,7 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o
 
 # GEM code
 i915-y += i915_cmd_parser.o \
+	  i915_gem_batch_pool.o \
 	  i915_gem_context.o \
 	  i915_gem_render_state.o \
 	  i915_gem_debug.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c4f2cb6..b12a062 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1154,6 +1154,12 @@ struct intel_l3_parity {
 	int which_slice;
 };
 
+struct i915_gem_batch_pool {
+	struct drm_device *dev;
+	struct list_head active_list;
+	struct list_head inactive_list;
+};
+
 struct i915_gem_mm {
 	/** Memory allocator for GTT stolen memory */
 	struct drm_mm stolen;
@@ -1885,6 +1891,8 @@ struct drm_i915_gem_object {
 	/** Used in execbuf to temporarily hold a ref */
 	struct list_head obj_exec_link;
 
+	struct list_head batch_pool_list;
+
 	/**
 	 * This is set if the object is on the active lists (has pending
 	 * rendering and so a non-zero seqno), and is not set if it i s on
@@ -2849,6 +2857,13 @@ void i915_destroy_error_state(struct drm_device *dev);
 void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone);
 const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
 
+/* i915_gem_batch_pool.c */
+void i915_gem_batch_pool_init(struct drm_device *dev,
+			      struct i915_gem_batch_pool *pool);
+void i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool);
+struct drm_i915_gem_object*
+i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool, size_t size);
+
 /* i915_cmd_parser.c */
 int i915_cmd_parser_get_version(void);
 int i915_cmd_parser_init_ring(struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 86cf428..b19dd06 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4433,6 +4433,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
 	INIT_LIST_HEAD(&obj->ring_list);
 	INIT_LIST_HEAD(&obj->obj_exec_link);
 	INIT_LIST_HEAD(&obj->vma_list);
+	INIT_LIST_HEAD(&obj->batch_pool_list);
 
 	obj->ops = ops;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_batch_pool.c b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
new file mode 100644
index 0000000..ccbe8f9
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
@@ -0,0 +1,152 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_drv.h"
+
+/**
+ * DOC: batch pool
+ *
+ * In order to submit batch buffers as 'secure', the software command parser
+ * must ensure that a batch buffer cannot be modified after parsing. It does
+ * this by copying the user provided batch buffer contents to a kernel owned
+ * buffer from which the hardware will actually execute, and by carefully
+ * managing the address space bindings for such buffers.
+ *
+ * The batch pool framework provides a mechanism for the driver to manage a
+ * set of scratch buffers to use for this purpose. The framework can be
+ * extended to support other uses cases should they arise.
+ */
+
+/**
+ * i915_gem_batch_pool_init() - initialize a batch buffer pool
+ * @dev: the drm device
+ * @pool: the batch buffer pool
+ */
+void i915_gem_batch_pool_init(struct drm_device *dev,
+			      struct i915_gem_batch_pool *pool)
+{
+	pool->dev = dev;
+	INIT_LIST_HEAD(&pool->active_list);
+	INIT_LIST_HEAD(&pool->inactive_list);
+}
+
+/**
+ * i915_gem_batch_pool_fini() - clean up a batch buffer pool
+ * @pool: the pool to clean up
+ *
+ * Note: Callers must hold the struct_mutex.
+ */
+void i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool)
+{
+	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
+
+	while (!list_empty(&pool->active_list)) {
+		struct drm_i915_gem_object *obj =
+			list_first_entry(&pool->active_list,
+					 struct drm_i915_gem_object,
+					 batch_pool_list);
+
+		WARN_ON(obj->active);
+
+		list_del_init(&obj->batch_pool_list);
+		drm_gem_object_unreference(&obj->base);
+	}
+
+	while (!list_empty(&pool->inactive_list)) {
+		struct drm_i915_gem_object *obj =
+			list_first_entry(&pool->inactive_list,
+					 struct drm_i915_gem_object,
+					 batch_pool_list);
+
+		list_del_init(&obj->batch_pool_list);
+		drm_gem_object_unreference(&obj->base);
+	}
+}
+
+/**
+ * i915_gem_batch_pool_get() - select a buffer from the pool
+ * @pool: the batch buffer pool
+ * @size: the minimum desired size of the returned buffer
+ *
+ * Finds or allocates a batch buffer in the pool with at least the requested
+ * size. The caller is responsible for any domain, active/inactive, or
+ * purgeability management for the returned buffer.
+ *
+ * Note: Callers must hold the struct_mutex
+ *
+ * Return: the selected batch buffer object
+ */
+struct drm_i915_gem_object *
+i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,
+			size_t size)
+{
+	struct drm_i915_gem_object *obj = NULL;
+	struct drm_i915_gem_object *tmp, *next;
+	bool was_purged;
+
+	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
+
+	list_for_each_entry_safe(tmp, next,
+				 &pool->active_list, batch_pool_list) {
+		if (!tmp->active)
+			list_move_tail(&tmp->batch_pool_list,
+				       &pool->inactive_list);
+	}
+
+	do {
+		was_purged = false;
+
+		list_for_each_entry_safe(tmp, next,
+				&pool->inactive_list, batch_pool_list) {
+			/*
+			 * Select a buffer that is at least as big as needed
+			 * but not 'too much' bigger. A better way to do this
+			 * might be to bucket the pool objects based on size.
+			 */
+			if (tmp->base.size >= size &&
+			    tmp->base.size <= (2 * size)) {
+				obj = tmp;
+				break;
+			}
+
+			if (tmp->madv == __I915_MADV_PURGED) {
+				was_purged = true;
+				list_del(&tmp->batch_pool_list);
+				drm_gem_object_unreference(&tmp->base);
+			}
+		}
+	} while (was_purged);
+
+	if (!obj) {
+		obj = i915_gem_alloc_object(pool->dev, size);
+		if (!obj)
+			return ERR_PTR(-ENOMEM);
+
+		list_add_tail(&obj->batch_pool_list, &pool->inactive_list);
+	}
+
+	list_move_tail(&obj->batch_pool_list, &pool->active_list);
+
+	return obj;
+}
-- 
1.9.1

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Re: [PATCH v5 1/7] drm/i915: Implement a framework for batch buffer pools

[Bloomfield, Jon]

> -----Original Message-----
> From: Nguyen, Michael H
> Sent: Wednesday, November 26, 2014 9:54 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Bloomfield, Jon; Volkin, Bradley D
> Subject: [PATCH v5 1/7] drm/i915: Implement a framework for batch buffer
> pools
> 
> From: Brad Volkin <bradley.d.volkin@intel.com>
> 
> This adds a small module for managing a pool of batch buffers.
> The only current use case is for the command parser, as described in the
> kerneldoc in the patch. The code is simple, but separating it out makes it
> easier to change the underlying algorithms and to extend to future use cases
> should they arise.
> 
> The interface is simple: init to create an empty pool, fini to clean it up, get to
> obtain a new buffer. Note that all buffers are expected to be inactive before
> cleaning up the pool.
> 
> Locking is currently based on the caller holding the struct_mutex.
> We already do that in the places where we will use the batch pool for the
> command parser.
> 
> v2:
> - s/BUG_ON/WARN_ON/ for locking assertions
> - Remove the cap on pool size
> - Switch from alloc/free to init/fini
> 
> v3:
> - Idiomatic looping structure in _fini
> - Correct handling of purged objects
> - Don't return a buffer that's too much larger than needed
> 
> v4:
> - Rebased to latest -nightly
> 
> v5:
> - Remove _put() function and clean up comments to match
> 
> v6:
> - Move purged check inside the loop (danvet, from v4 1/7 feedback)
> 
> Issue: VIZ-4719
> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
> ---
>  Documentation/DocBook/drm.tmpl             |   5 +
>  drivers/gpu/drm/i915/Makefile              |   1 +
>  drivers/gpu/drm/i915/i915_drv.h            |  15 +++
>  drivers/gpu/drm/i915/i915_gem.c            |   1 +
>  drivers/gpu/drm/i915/i915_gem_batch_pool.c | 152
> +++++++++++++++++++++++++++++
>  5 files changed, 174 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c
> 
> diff --git a/Documentation/DocBook/drm.tmpl
> b/Documentation/DocBook/drm.tmpl index 944e8ed..b5943d4 100644
> --- a/Documentation/DocBook/drm.tmpl
> +++ b/Documentation/DocBook/drm.tmpl
> @@ -4028,6 +4028,11 @@ int num_ioctls;</synopsis>
> !Idrivers/gpu/drm/i915/i915_cmd_parser.c
>        </sect2>
>        <sect2>
> +        <title>Batchbuffer Pools</title>
> +!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
> +!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
> +      </sect2>
> +      <sect2>
>          <title>Logical Rings, Logical Ring Contexts and Execlists</title>
> !Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and
> Execlists  !Idrivers/gpu/drm/i915/intel_lrc.c
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index e4083e4..c8dbb37d 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -19,6 +19,7 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o
> 
>  # GEM code
>  i915-y += i915_cmd_parser.o \
> +	  i915_gem_batch_pool.o \
>  	  i915_gem_context.o \
>  	  i915_gem_render_state.o \
>  	  i915_gem_debug.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index c4f2cb6..b12a062 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1154,6 +1154,12 @@ struct intel_l3_parity {
>  	int which_slice;
>  };
> 
> +struct i915_gem_batch_pool {
> +	struct drm_device *dev;
> +	struct list_head active_list;
> +	struct list_head inactive_list;
> +};
> +
>  struct i915_gem_mm {
>  	/** Memory allocator for GTT stolen memory */
>  	struct drm_mm stolen;
> @@ -1885,6 +1891,8 @@ struct drm_i915_gem_object {
>  	/** Used in execbuf to temporarily hold a ref */
>  	struct list_head obj_exec_link;
> 
> +	struct list_head batch_pool_list;
> +
>  	/**
>  	 * This is set if the object is on the active lists (has pending
>  	 * rendering and so a non-zero seqno), and is not set if it i s on @@ -
> 2849,6 +2857,13 @@ void i915_destroy_error_state(struct drm_device
> *dev);  void i915_get_extra_instdone(struct drm_device *dev, uint32_t
> *instdone);  const char *i915_cache_level_str(struct drm_i915_private *i915,
> int type);
> 
> +/* i915_gem_batch_pool.c */
> +void i915_gem_batch_pool_init(struct drm_device *dev,
> +			      struct i915_gem_batch_pool *pool); void
> +i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool); struct
> +drm_i915_gem_object* i915_gem_batch_pool_get(struct
> i915_gem_batch_pool
> +*pool, size_t size);
> +
>  /* i915_cmd_parser.c */
>  int i915_cmd_parser_get_version(void);
>  int i915_cmd_parser_init_ring(struct intel_engine_cs *ring); diff --git
> a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 86cf428..b19dd06 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4433,6 +4433,7 @@ void i915_gem_object_init(struct
> drm_i915_gem_object *obj,
>  	INIT_LIST_HEAD(&obj->ring_list);
>  	INIT_LIST_HEAD(&obj->obj_exec_link);
>  	INIT_LIST_HEAD(&obj->vma_list);
> +	INIT_LIST_HEAD(&obj->batch_pool_list);
> 
>  	obj->ops = ops;
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_batch_pool.c
> b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
> new file mode 100644
> index 0000000..ccbe8f9
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
> @@ -0,0 +1,152 @@
> +/*
> + * Copyright © 2014 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person
> +obtaining a
> + * copy of this software and associated documentation files (the
> +"Software"),
> + * to deal in the Software without restriction, including without
> +limitation
> + * the rights to use, copy, modify, merge, publish, distribute,
> +sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom
> +the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> +next
> + * paragraph) shall be included in all copies or substantial portions
> +of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> +EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> +MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
> EVENT
> +SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> +OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> +ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> OTHER
> +DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include "i915_drv.h"
> +
> +/**
> + * DOC: batch pool
> + *
> + * In order to submit batch buffers as 'secure', the software command
> +parser
> + * must ensure that a batch buffer cannot be modified after parsing. It
> +does
> + * this by copying the user provided batch buffer contents to a kernel
> +owned
> + * buffer from which the hardware will actually execute, and by
> +carefully
> + * managing the address space bindings for such buffers.
> + *
> + * The batch pool framework provides a mechanism for the driver to
> +manage a
> + * set of scratch buffers to use for this purpose. The framework can be
> + * extended to support other uses cases should they arise.
> + */
> +
> +/**
> + * i915_gem_batch_pool_init() - initialize a batch buffer pool
> + * @dev: the drm device
> + * @pool: the batch buffer pool
> + */
> +void i915_gem_batch_pool_init(struct drm_device *dev,
> +			      struct i915_gem_batch_pool *pool) {
> +	pool->dev = dev;
> +	INIT_LIST_HEAD(&pool->active_list);
> +	INIT_LIST_HEAD(&pool->inactive_list);
> +}
> +
> +/**
> + * i915_gem_batch_pool_fini() - clean up a batch buffer pool
> + * @pool: the pool to clean up
> + *
> + * Note: Callers must hold the struct_mutex.
> + */
> +void i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool) {
> +	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
> +
> +	while (!list_empty(&pool->active_list)) {
> +		struct drm_i915_gem_object *obj =
> +			list_first_entry(&pool->active_list,
> +					 struct drm_i915_gem_object,
> +					 batch_pool_list);
> +
> +		WARN_ON(obj->active);
> +
> +		list_del_init(&obj->batch_pool_list);
> +		drm_gem_object_unreference(&obj->base);
> +	}
> +
> +	while (!list_empty(&pool->inactive_list)) {
> +		struct drm_i915_gem_object *obj =
> +			list_first_entry(&pool->inactive_list,
> +					 struct drm_i915_gem_object,
> +					 batch_pool_list);
> +
> +		list_del_init(&obj->batch_pool_list);
> +		drm_gem_object_unreference(&obj->base);
> +	}
> +}
> +
> +/**
> + * i915_gem_batch_pool_get() - select a buffer from the pool
> + * @pool: the batch buffer pool
> + * @size: the minimum desired size of the returned buffer
> + *
> + * Finds or allocates a batch buffer in the pool with at least the
> +requested
> + * size. The caller is responsible for any domain, active/inactive, or
> + * purgeability management for the returned buffer.
> + *
> + * Note: Callers must hold the struct_mutex
> + *
> + * Return: the selected batch buffer object  */ struct
> +drm_i915_gem_object * i915_gem_batch_pool_get(struct
> +i915_gem_batch_pool *pool,
> +			size_t size)
> +{
> +	struct drm_i915_gem_object *obj = NULL;
> +	struct drm_i915_gem_object *tmp, *next;
> +	bool was_purged;
> +
> +	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
> +
> +	list_for_each_entry_safe(tmp, next,
> +				 &pool->active_list, batch_pool_list) {
> +		if (!tmp->active)
> +			list_move_tail(&tmp->batch_pool_list,
> +				       &pool->inactive_list);
> +	}
> +
> +	do {
> +		was_purged = false;
> +
> +		list_for_each_entry_safe(tmp, next,
> +				&pool->inactive_list, batch_pool_list) {
> +			/*
> +			 * Select a buffer that is at least as big as needed
> +			 * but not 'too much' bigger. A better way to do this
> +			 * might be to bucket the pool objects based on size.
> +			 */
> +			if (tmp->base.size >= size &&
> +			    tmp->base.size <= (2 * size)) {
> +				obj = tmp;
> +				break;
> +			}
> +
> +			if (tmp->madv == __I915_MADV_PURGED) {
> +				was_purged = true;
> +				list_del(&tmp->batch_pool_list);
> +				drm_gem_object_unreference(&tmp-
> >base);
> +			}
> +		}
> +	} while (was_purged);

I don't understand what the outer-loop/was_purged is trying to do here.

I might be missing something subtle, but the following scenarios seem to have issues:

	1) There are no suitable objects in the pool, but there are purgeable objects
		We'll loop through the whole list, purging any puregable objects.
		On completion of the inner loop, was_purged==true, so we'll go back through the 
		whole list again. We still won't find any suitable objects, and won't find any more
		purgeable objects either, so the second pass is redundant.

	2) There is a suitable object, but there are purgeable objects before it
		We'll purge objects up to the first suitable object, and break out of the inner loop
		We'll then go back through a second time because was_purged is set, and select
		the exact same object as we selected last time.
		Any purgeable objects after the selected object will remain un-purged

If the intention here is to ensure we always purge all purgeable objects, then I
think we just need to remove the break, and the outer-loop, along with was_purged.
This will always traverse the entire list, and end with obj set to the last suitable object
in the list (if any). 

If you want to be optimal you could adjust the condition to only choose objects that are 
smaller than any previously selected object.

> +
> +	if (!obj) {
> +		obj = i915_gem_alloc_object(pool->dev, size);
> +		if (!obj)
> +			return ERR_PTR(-ENOMEM);
> +
> +		list_add_tail(&obj->batch_pool_list, &pool->inactive_list);
> +	}
> +
> +	list_move_tail(&obj->batch_pool_list, &pool->active_list);
> +
> +	return obj;
> +}
> --
> 1.9.1

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Re: [PATCH v5 1/7] drm/i915: Implement a framework for batch buffer pools

[Michael H. Nguyen]

On 12/08/2014 07:19 AM, Bloomfield, Jon wrote:
>> -----Original Message-----
>> From: Nguyen, Michael H
>> Sent: Wednesday, November 26, 2014 9:54 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Bloomfield, Jon; Volkin, Bradley D
>> Subject: [PATCH v5 1/7] drm/i915: Implement a framework for batch buffer
>> pools
>>
>> From: Brad Volkin <bradley.d.volkin@intel.com>
>>
>> This adds a small module for managing a pool of batch buffers.
>> The only current use case is for the command parser, as described in the
>> kerneldoc in the patch. The code is simple, but separating it out makes it
>> easier to change the underlying algorithms and to extend to future use cases
>> should they arise.
>>
>> The interface is simple: init to create an empty pool, fini to clean it up, get to
>> obtain a new buffer. Note that all buffers are expected to be inactive before
>> cleaning up the pool.
>>
>> Locking is currently based on the caller holding the struct_mutex.
>> We already do that in the places where we will use the batch pool for the
>> command parser.
>>
>> v2:
>> - s/BUG_ON/WARN_ON/ for locking assertions
>> - Remove the cap on pool size
>> - Switch from alloc/free to init/fini
>>
>> v3:
>> - Idiomatic looping structure in _fini
>> - Correct handling of purged objects
>> - Don't return a buffer that's too much larger than needed
>>
>> v4:
>> - Rebased to latest -nightly
>>
>> v5:
>> - Remove _put() function and clean up comments to match
>>
>> v6:
>> - Move purged check inside the loop (danvet, from v4 1/7 feedback)
>>
>> Issue: VIZ-4719
>> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
>> ---
>>   Documentation/DocBook/drm.tmpl             |   5 +
>>   drivers/gpu/drm/i915/Makefile              |   1 +
>>   drivers/gpu/drm/i915/i915_drv.h            |  15 +++
>>   drivers/gpu/drm/i915/i915_gem.c            |   1 +
>>   drivers/gpu/drm/i915/i915_gem_batch_pool.c | 152
>> +++++++++++++++++++++++++++++
>>   5 files changed, 174 insertions(+)
>>   create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c
>>
>> diff --git a/Documentation/DocBook/drm.tmpl
>> b/Documentation/DocBook/drm.tmpl index 944e8ed..b5943d4 100644
>> --- a/Documentation/DocBook/drm.tmpl
>> +++ b/Documentation/DocBook/drm.tmpl
>> @@ -4028,6 +4028,11 @@ int num_ioctls;</synopsis>
>> !Idrivers/gpu/drm/i915/i915_cmd_parser.c
>>         </sect2>
>>         <sect2>
>> +        <title>Batchbuffer Pools</title>
>> +!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
>> +!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
>> +      </sect2>
>> +      <sect2>
>>           <title>Logical Rings, Logical Ring Contexts and Execlists</title>
>> !Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and
>> Execlists  !Idrivers/gpu/drm/i915/intel_lrc.c
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index e4083e4..c8dbb37d 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -19,6 +19,7 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o
>>
>>   # GEM code
>>   i915-y += i915_cmd_parser.o \
>> +	  i915_gem_batch_pool.o \
>>   	  i915_gem_context.o \
>>   	  i915_gem_render_state.o \
>>   	  i915_gem_debug.o \
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h index c4f2cb6..b12a062 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1154,6 +1154,12 @@ struct intel_l3_parity {
>>   	int which_slice;
>>   };
>>
>> +struct i915_gem_batch_pool {
>> +	struct drm_device *dev;
>> +	struct list_head active_list;
>> +	struct list_head inactive_list;
>> +};
>> +
>>   struct i915_gem_mm {
>>   	/** Memory allocator for GTT stolen memory */
>>   	struct drm_mm stolen;
>> @@ -1885,6 +1891,8 @@ struct drm_i915_gem_object {
>>   	/** Used in execbuf to temporarily hold a ref */
>>   	struct list_head obj_exec_link;
>>
>> +	struct list_head batch_pool_list;
>> +
>>   	/**
>>   	 * This is set if the object is on the active lists (has pending
>>   	 * rendering and so a non-zero seqno), and is not set if it i s on @@ -
>> 2849,6 +2857,13 @@ void i915_destroy_error_state(struct drm_device
>> *dev);  void i915_get_extra_instdone(struct drm_device *dev, uint32_t
>> *instdone);  const char *i915_cache_level_str(struct drm_i915_private *i915,
>> int type);
>>
>> +/* i915_gem_batch_pool.c */
>> +void i915_gem_batch_pool_init(struct drm_device *dev,
>> +			      struct i915_gem_batch_pool *pool); void
>> +i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool); struct
>> +drm_i915_gem_object* i915_gem_batch_pool_get(struct
>> i915_gem_batch_pool
>> +*pool, size_t size);
>> +
>>   /* i915_cmd_parser.c */
>>   int i915_cmd_parser_get_version(void);
>>   int i915_cmd_parser_init_ring(struct intel_engine_cs *ring); diff --git
>> a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>> index 86cf428..b19dd06 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -4433,6 +4433,7 @@ void i915_gem_object_init(struct
>> drm_i915_gem_object *obj,
>>   	INIT_LIST_HEAD(&obj->ring_list);
>>   	INIT_LIST_HEAD(&obj->obj_exec_link);
>>   	INIT_LIST_HEAD(&obj->vma_list);
>> +	INIT_LIST_HEAD(&obj->batch_pool_list);
>>
>>   	obj->ops = ops;
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> new file mode 100644
>> index 0000000..ccbe8f9
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> @@ -0,0 +1,152 @@
>> +/*
>> + * Copyright © 2014 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person
>> +obtaining a
>> + * copy of this software and associated documentation files (the
>> +"Software"),
>> + * to deal in the Software without restriction, including without
>> +limitation
>> + * the rights to use, copy, modify, merge, publish, distribute,
>> +sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom
>> +the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the
>> +next
>> + * paragraph) shall be included in all copies or substantial portions
>> +of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> +EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>> +MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
>> EVENT
>> +SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
>> DAMAGES OR
>> +OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> +ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> OTHER
>> +DEALINGS
>> + * IN THE SOFTWARE.
>> + *
>> + */
>> +
>> +#include "i915_drv.h"
>> +
>> +/**
>> + * DOC: batch pool
>> + *
>> + * In order to submit batch buffers as 'secure', the software command
>> +parser
>> + * must ensure that a batch buffer cannot be modified after parsing. It
>> +does
>> + * this by copying the user provided batch buffer contents to a kernel
>> +owned
>> + * buffer from which the hardware will actually execute, and by
>> +carefully
>> + * managing the address space bindings for such buffers.
>> + *
>> + * The batch pool framework provides a mechanism for the driver to
>> +manage a
>> + * set of scratch buffers to use for this purpose. The framework can be
>> + * extended to support other uses cases should they arise.
>> + */
>> +
>> +/**
>> + * i915_gem_batch_pool_init() - initialize a batch buffer pool
>> + * @dev: the drm device
>> + * @pool: the batch buffer pool
>> + */
>> +void i915_gem_batch_pool_init(struct drm_device *dev,
>> +			      struct i915_gem_batch_pool *pool) {
>> +	pool->dev = dev;
>> +	INIT_LIST_HEAD(&pool->active_list);
>> +	INIT_LIST_HEAD(&pool->inactive_list);
>> +}
>> +
>> +/**
>> + * i915_gem_batch_pool_fini() - clean up a batch buffer pool
>> + * @pool: the pool to clean up
>> + *
>> + * Note: Callers must hold the struct_mutex.
>> + */
>> +void i915_gem_batch_pool_fini(struct i915_gem_batch_pool *pool) {
>> +	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
>> +
>> +	while (!list_empty(&pool->active_list)) {
>> +		struct drm_i915_gem_object *obj =
>> +			list_first_entry(&pool->active_list,
>> +					 struct drm_i915_gem_object,
>> +					 batch_pool_list);
>> +
>> +		WARN_ON(obj->active);
>> +
>> +		list_del_init(&obj->batch_pool_list);
>> +		drm_gem_object_unreference(&obj->base);
>> +	}
>> +
>> +	while (!list_empty(&pool->inactive_list)) {
>> +		struct drm_i915_gem_object *obj =
>> +			list_first_entry(&pool->inactive_list,
>> +					 struct drm_i915_gem_object,
>> +					 batch_pool_list);
>> +
>> +		list_del_init(&obj->batch_pool_list);
>> +		drm_gem_object_unreference(&obj->base);
>> +	}
>> +}
>> +
>> +/**
>> + * i915_gem_batch_pool_get() - select a buffer from the pool
>> + * @pool: the batch buffer pool
>> + * @size: the minimum desired size of the returned buffer
>> + *
>> + * Finds or allocates a batch buffer in the pool with at least the
>> +requested
>> + * size. The caller is responsible for any domain, active/inactive, or
>> + * purgeability management for the returned buffer.
>> + *
>> + * Note: Callers must hold the struct_mutex
>> + *
>> + * Return: the selected batch buffer object  */ struct
>> +drm_i915_gem_object * i915_gem_batch_pool_get(struct
>> +i915_gem_batch_pool *pool,
>> +			size_t size)
>> +{
>> +	struct drm_i915_gem_object *obj = NULL;
>> +	struct drm_i915_gem_object *tmp, *next;
>> +	bool was_purged;
>> +
>> +	WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
>> +
>> +	list_for_each_entry_safe(tmp, next,
>> +				 &pool->active_list, batch_pool_list) {
>> +		if (!tmp->active)
>> +			list_move_tail(&tmp->batch_pool_list,
>> +				       &pool->inactive_list);
>> +	}
>> +
>> +	do {
>> +		was_purged = false;
>> +
>> +		list_for_each_entry_safe(tmp, next,
>> +				&pool->inactive_list, batch_pool_list) {
>> +			/*
>> +			 * Select a buffer that is at least as big as needed
>> +			 * but not 'too much' bigger. A better way to do this
>> +			 * might be to bucket the pool objects based on size.
>> +			 */
>> +			if (tmp->base.size >= size &&
>> +			    tmp->base.size <= (2 * size)) {
>> +				obj = tmp;
>> +				break;
>> +			}
>> +
>> +			if (tmp->madv == __I915_MADV_PURGED) {
>> +				was_purged = true;
>> +				list_del(&tmp->batch_pool_list);
>> +				drm_gem_object_unreference(&tmp-
>>> base);
>> +			}
>> +		}
>> +	} while (was_purged);
>
> I don't understand what the outer-loop/was_purged is trying to do here.

There was some unhappiness about this from Daniel and Chris. Taking 
their feedback, ended up w/ an RFC snippet mentioned here intended to 
simplify and make it easier to discern the logic.

http://lists.freedesktop.org/archives/intel-gfx/2014-December/056579.html

In a single loop, we accomplish 2 goals (a) do some house cleaning while 
in the loop and (b) find a suitable obj from the pool (one that is not 
active and not purged).

They seemed happy w/ it. Will send it the next rev of the series.

Thanks,
Mike

>
> I might be missing something subtle, but the following scenarios seem to have issues:
>
> 	1) There are no suitable objects in the pool, but there are purgeable objects
> 		We'll loop through the whole list, purging any puregable objects.
> 		On completion of the inner loop, was_purged==true, so we'll go back through the
> 		whole list again. We still won't find any suitable objects, and won't find any more
> 		purgeable objects either, so the second pass is redundant.
>
> 	2) There is a suitable object, but there are purgeable objects before it
> 		We'll purge objects up to the first suitable object, and break out of the inner loop
> 		We'll then go back through a second time because was_purged is set, and select
> 		the exact same object as we selected last time.
> 		Any purgeable objects after the selected object will remain un-purged
>
> If the intention here is to ensure we always purge all purgeable objects, then I
> think we just need to remove the break, and the outer-loop, along with was_purged.
> This will always traverse the entire list, and end with obj set to the last suitable object
> in the list (if any).
>
> If you want to be optimal you could adjust the condition to only choose objects that are
> smaller than any previously selected object.
>
>> +
>> +	if (!obj) {
>> +		obj = i915_gem_alloc_object(pool->dev, size);
>> +		if (!obj)
>> +			return ERR_PTR(-ENOMEM);
>> +
>> +		list_add_tail(&obj->batch_pool_list, &pool->inactive_list);
>> +	}
>> +
>> +	list_move_tail(&obj->batch_pool_list, &pool->active_list);
>> +
>> +	return obj;
>> +}
>> --
>> 1.9.1
>
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[PATCH v5 2/7] drm/i915: Use batch pools with the command parser

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

This patch sets up all of the tracking and copying necessary to
use batch pools with the command parser and dispatches the copied
(shadow) batch to the hardware.

After this patch, the parser is in 'enabling' mode.

Note that performance takes a hit from the copy in some cases
and will likely need some work. At a rough pass, the memcpy
appears to be the bottleneck. Without having done a deeper
analysis, two ideas that come to mind are:
1) Copy sections of the batch at a time, as they are reached
   by parsing. Might improve cache locality.
2) Copy only up to the userspace-supplied batch length and
   memset the rest of the buffer. Reduces the number of reads.

v2:
- Remove setting the capacity of the pool
- One global pool instead of per-ring pools
- Replace batch_obj with shadow_batch_obj and hook into eb->vmas
- Memset any space in the shadow batch beyond what gets copied
- Rebased on execlist prep refactoring

v3:
- Rebase on chained batch handling
- Squash in setting the secure dispatch flag
- Add a note about the interaction w/secure dispatch pinning
- Check for request->batch_obj == NULL in i915_gem_free_request

v4:
- Fix read domains for shadow_batch_obj
- Remove the set_to_gtt_domain call from i915_parse_cmds
- ggtt_pin/unpin in the parser block to simplify error handling
- Check USES_FULL_PPGTT before setting DISPATCH_SECURE flag
- Remove i915_gem_batch_pool_put calls

v5:
- Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after
  the parser (danvet, from v4 0/7 feedback)

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c     | 79 +++++++++++++++++++++++-------
 drivers/gpu/drm/i915/i915_dma.c            |  1 +
 drivers/gpu/drm/i915/i915_drv.h            |  8 +++
 drivers/gpu/drm/i915/i915_gem.c            |  2 +
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 52 +++++++++++++++++---
 5 files changed, 119 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 22c992a..69e51fa 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -840,6 +840,56 @@ finish:
 	return (u32*)addr;
 }
 
+/* Returns a vmap'd pointer to dest_obj, which the caller must unmap */
+static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
+		       struct drm_i915_gem_object *src_obj)
+{
+	int ret = 0;
+	int needs_clflush = 0;
+	u32 *src_addr, *dest_addr = NULL;
+
+	ret = i915_gem_obj_prepare_shmem_read(src_obj, &needs_clflush);
+	if (ret) {
+		DRM_DEBUG_DRIVER("CMD: failed to prep read\n");
+		return ERR_PTR(ret);
+	}
+
+	src_addr = vmap_batch(src_obj);
+	if (!src_addr) {
+		DRM_DEBUG_DRIVER("CMD: Failed to vmap batch\n");
+		ret = -ENOMEM;
+		goto unpin_src;
+	}
+
+	if (needs_clflush)
+		drm_clflush_virt_range((char *)src_addr, src_obj->base.size);
+
+	ret = i915_gem_object_set_to_cpu_domain(dest_obj, true);
+	if (ret) {
+		DRM_DEBUG_DRIVER("CMD: Failed to set batch CPU domain\n");
+		goto unmap_src;
+	}
+
+	dest_addr = vmap_batch(dest_obj);
+	if (!dest_addr) {
+		DRM_DEBUG_DRIVER("CMD: Failed to vmap shadow batch\n");
+		ret = -ENOMEM;
+		goto unmap_src;
+	}
+
+	memcpy(dest_addr, src_addr, src_obj->base.size);
+	if (dest_obj->base.size > src_obj->base.size)
+		memset((u8 *)dest_addr + src_obj->base.size, 0,
+		       dest_obj->base.size - src_obj->base.size);
+
+unmap_src:
+	vunmap(src_addr);
+unpin_src:
+	i915_gem_object_unpin_pages(src_obj);
+
+	return ret ? ERR_PTR(ret) : dest_addr;
+}
+
 /**
  * i915_needs_cmd_parser() - should a given ring use software command parsing?
  * @ring: the ring in question
@@ -956,6 +1006,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
  * i915_parse_cmds() - parse a submitted batch buffer for privilege violations
  * @ring: the ring on which the batch is to execute
  * @batch_obj: the batch buffer in question
+ * @shadow_batch_obj: copy of the batch buffer in question
  * @batch_start_offset: byte offset in the batch at which execution starts
  * @is_master: is the submitting process the drm master?
  *
@@ -967,32 +1018,28 @@ static bool check_cmd(const struct intel_engine_cs *ring,
  */
 int i915_parse_cmds(struct intel_engine_cs *ring,
 		    struct drm_i915_gem_object *batch_obj,
+		    struct drm_i915_gem_object *shadow_batch_obj,
 		    u32 batch_start_offset,
 		    bool is_master)
 {
 	int ret = 0;
 	u32 *cmd, *batch_base, *batch_end;
 	struct drm_i915_cmd_descriptor default_desc = { 0 };
-	int needs_clflush = 0;
 	bool oacontrol_set = false; /* OACONTROL tracking. See check_cmd() */
 
-	ret = i915_gem_obj_prepare_shmem_read(batch_obj, &needs_clflush);
-	if (ret) {
-		DRM_DEBUG_DRIVER("CMD: failed to prep read\n");
-		return ret;
+	batch_base = copy_batch(shadow_batch_obj, batch_obj);
+	if (IS_ERR(batch_base)) {
+		DRM_DEBUG_DRIVER("CMD: Failed to copy batch\n");
+		return PTR_ERR(batch_base);
 	}
 
-	batch_base = vmap_batch(batch_obj);
-	if (!batch_base) {
-		DRM_DEBUG_DRIVER("CMD: Failed to vmap batch\n");
-		i915_gem_object_unpin_pages(batch_obj);
-		return -ENOMEM;
-	}
-
-	if (needs_clflush)
-		drm_clflush_virt_range((char *)batch_base, batch_obj->base.size);
-
 	cmd = batch_base + (batch_start_offset / sizeof(*cmd));
+
+	/*
+	 * We use the source object's size because the shadow object is as
+	 * large or larger and copy_batch() will write MI_NOPs to the extra
+	 * space. Parsing should be faster in some cases this way.
+	 */
 	batch_end = cmd + (batch_obj->base.size / sizeof(*batch_end));
 
 	while (cmd < batch_end) {
@@ -1054,8 +1101,6 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 
 	vunmap(batch_base);
 
-	i915_gem_object_unpin_pages(batch_obj);
-
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 56f6211..61286d8 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1896,6 +1896,7 @@ int i915_driver_unload(struct drm_device *dev)
 
 		mutex_lock(&dev->struct_mutex);
 		i915_gem_cleanup_ringbuffer(dev);
+		i915_gem_batch_pool_fini(&dev_priv->mm.batch_pool);
 		i915_gem_context_fini(dev);
 		mutex_unlock(&dev->struct_mutex);
 		i915_gem_cleanup_stolen(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b12a062..490978e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1173,6 +1173,13 @@ struct i915_gem_mm {
 	 */
 	struct list_head unbound_list;
 
+	/*
+	 * A pool of objects to use as shadow copies of client batch buffers
+	 * when the command parser is enabled. Prevents the client from
+	 * modifying the batch contents after software parsing.
+	 */
+	struct i915_gem_batch_pool batch_pool;
+
 	/** Usable portion of the GTT for GEM */
 	unsigned long stolen_base; /* limited to low memory (32-bit) */
 
@@ -2871,6 +2878,7 @@ void i915_cmd_parser_fini_ring(struct intel_engine_cs *ring);
 bool i915_needs_cmd_parser(struct intel_engine_cs *ring);
 int i915_parse_cmds(struct intel_engine_cs *ring,
 		    struct drm_i915_gem_object *batch_obj,
+		    struct drm_i915_gem_object *shadow_batch_obj,
 		    u32 batch_start_offset,
 		    bool is_master);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b19dd06..78d78b2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5113,6 +5113,8 @@ i915_gem_load(struct drm_device *dev)
 	dev_priv->mm.oom_notifier.notifier_call = i915_gem_shrinker_oom;
 	register_oom_notifier(&dev_priv->mm.oom_notifier);
 
+	i915_gem_batch_pool_init(dev, &dev_priv->mm.batch_pool);
+
 	mutex_init(&dev_priv->fb_tracking.lock);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index e1ed85a..66e0a6a 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1236,6 +1236,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct eb_vmas *eb;
 	struct drm_i915_gem_object *batch_obj;
+	struct drm_i915_gem_object *shadow_batch_obj = NULL;
+	struct drm_i915_gem_exec_object2 shadow_exec_entry;
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
 	struct i915_address_space *vm;
@@ -1358,28 +1360,66 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		ret = -EINVAL;
 		goto err;
 	}
-	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
 
 	if (i915_needs_cmd_parser(ring)) {
+		shadow_batch_obj =
+			i915_gem_batch_pool_get(&dev_priv->mm.batch_pool,
+						batch_obj->base.size);
+		if (IS_ERR(shadow_batch_obj)) {
+			ret = PTR_ERR(shadow_batch_obj);
+			/* Don't try to clean up the obj in the error path */
+			shadow_batch_obj = NULL;
+			goto err;
+		}
+
+		ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0);
+		if (ret)
+			goto err;
+
 		ret = i915_parse_cmds(ring,
 				      batch_obj,
+				      shadow_batch_obj,
 				      args->batch_start_offset,
 				      file->is_master);
+		i915_gem_object_ggtt_unpin(shadow_batch_obj);
+
 		if (ret) {
 			if (ret != -EACCES)
 				goto err;
 		} else {
+			struct i915_vma *vma;
+
+			memset(&shadow_exec_entry, 0,
+			       sizeof(shadow_exec_entry));
+
+			vma = i915_gem_obj_to_ggtt(shadow_batch_obj);
+			vma->exec_entry = &shadow_exec_entry;
+			drm_gem_object_reference(&shadow_batch_obj->base);
+			list_add_tail(&vma->exec_list, &eb->vmas);
+
+			shadow_batch_obj->base.pending_read_domains =
+				batch_obj->base.pending_read_domains;
+
+			batch_obj = shadow_batch_obj;
+
 			/*
-			 * XXX: Actually do this when enabling batch copy...
+			 * Set the DISPATCH_SECURE bit to remove the NON_SECURE
+			 * bit from MI_BATCH_BUFFER_START commands issued in the
+			 * dispatch_execbuffer implementations. We specifically
+			 * don't want that set when the command parser is
+			 * enabled.
 			 *
-			 * Set the DISPATCH_SECURE bit to remove the NON_SECURE bit
-			 * from MI_BATCH_BUFFER_START commands issued in the
-			 * dispatch_execbuffer implementations. We specifically don't
-			 * want that set when the command parser is enabled.
+			 * FIXME: with aliasing ppgtt, buffers that should only
+			 * be in ggtt still end up in the aliasing ppgtt. remove
+			 * this check when that is fixed.
 			 */
+			if (USES_FULL_PPGTT(dev))
+				flags |= I915_DISPATCH_SECURE;
 		}
 	}
 
+	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
+
 	/* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
 	 * batch" bit. Hence we need to pin secure batches into the global gtt.
 	 * hsw should have this fixed, but bdw mucks it up again. */
-- 
1.9.1

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[PATCH v5 3/7] drm/i915: Add a batch pool debugfs file

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

It provides some useful information about the buffers in
the global command parser batch pool.

v2: rebase on global pool instead of per-ring pools

v3: rebase

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 41 +++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 319da61..efdd59a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -582,6 +582,46 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 	return 0;
 }
 
+static int i915_gem_batch_pool_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj;
+	int count = 0;
+	int ret;
+
+	ret = mutex_lock_interruptible(&dev->struct_mutex);
+	if (ret)
+		return ret;
+
+	seq_puts(m, "active:\n");
+	list_for_each_entry(obj,
+			    &dev_priv->mm.batch_pool.active_list,
+			    batch_pool_list) {
+		seq_puts(m, "   ");
+		describe_obj(m, obj);
+		seq_putc(m, '\n');
+		count++;
+	}
+
+	seq_puts(m, "inactive:\n");
+	list_for_each_entry(obj,
+			    &dev_priv->mm.batch_pool.inactive_list,
+			    batch_pool_list) {
+		seq_puts(m, "   ");
+		describe_obj(m, obj);
+		seq_putc(m, '\n');
+		count++;
+	}
+
+	seq_printf(m, "total: %d\n", count);
+
+	mutex_unlock(&dev->struct_mutex);
+
+	return 0;
+}
+
 static int i915_gem_request_info(struct seq_file *m, void *data)
 {
 	struct drm_info_node *node = m->private;
@@ -4262,6 +4302,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
 	{"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
 	{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
 	{"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
+	{"i915_gem_batch_pool", i915_gem_batch_pool_info, 0},
 	{"i915_frequency_info", i915_frequency_info, 0},
 	{"i915_drpc_info", i915_drpc_info, 0},
 	{"i915_emon_status", i915_emon_status, 0},
-- 
1.9.1

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[PATCH v5 4/7] drm/i915: Add batch pool details to i915_gem_objects debugfs

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

To better account for the potentially large memory consumption
of the batch pool.

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 45 +++++++++++++++++++++++++++++--------
 1 file changed, 36 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index efdd59a..60d5ceb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -360,6 +360,38 @@ static int per_file_stats(int id, void *ptr, void *data)
 	return 0;
 }
 
+#define print_file_stats(m, name, stats) \
+	seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu global, %zu shared, %zu unbound)\n", \
+		   name, \
+		   stats.count, \
+		   stats.total, \
+		   stats.active, \
+		   stats.inactive, \
+		   stats.global, \
+		   stats.shared, \
+		   stats.unbound)
+
+static void print_batch_pool_stats(struct seq_file *m,
+				   struct drm_i915_private *dev_priv)
+{
+	struct drm_i915_gem_object *obj;
+	struct file_stats stats;
+
+	memset(&stats, 0, sizeof(stats));
+
+	list_for_each_entry(obj,
+			    &dev_priv->mm.batch_pool.active_list,
+			    batch_pool_list)
+		per_file_stats(0, obj, &stats);
+
+	list_for_each_entry(obj,
+			    &dev_priv->mm.batch_pool.inactive_list,
+			    batch_pool_list)
+		per_file_stats(0, obj, &stats);
+
+	print_file_stats(m, "batch pool", stats);
+}
+
 #define count_vmas(list, member) do { \
 	list_for_each_entry(vma, list, member) { \
 		size += i915_gem_obj_ggtt_size(vma->obj); \
@@ -442,6 +474,9 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
 		   dev_priv->gtt.mappable_end - dev_priv->gtt.base.start);
 
 	seq_putc(m, '\n');
+	print_batch_pool_stats(m, dev_priv);
+
+	seq_putc(m, '\n');
 	list_for_each_entry_reverse(file, &dev->filelist, lhead) {
 		struct file_stats stats;
 		struct task_struct *task;
@@ -459,15 +494,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
 		 */
 		rcu_read_lock();
 		task = pid_task(file->pid, PIDTYPE_PID);
-		seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu global, %zu shared, %zu unbound)\n",
-			   task ? task->comm : "<unknown>",
-			   stats.count,
-			   stats.total,
-			   stats.active,
-			   stats.inactive,
-			   stats.global,
-			   stats.shared,
-			   stats.unbound);
+		print_file_stats(m, task ? task->comm : "<unknown>", stats);
 		rcu_read_unlock();
 	}
 
-- 
1.9.1

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[PATCH v5 5/7] drm/i915: Use batch length instead of object size in command parser

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

Previously we couldn't trust the user-supplied batch length because
it came directly from userspace (i.e. untrusted code). It would have
affected what commands software parsed without regard to what hardware
would actually execute, leaving a potential hole.

With the parser now copying the user supplied batch buffer and writing
MI_NOP commands to any space after the copied region, we can safely use
the batch length input. This should be a performance win as the actual
batch length is frequently much smaller than the allocated object size.

v2: Fix handling of non-zero batch_start_offset

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c     | 48 ++++++++++++++++++++----------
 drivers/gpu/drm/i915/i915_drv.h            |  1 +
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  1 +
 3 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 69e51fa..489ff43 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -842,11 +842,19 @@ finish:
 
 /* Returns a vmap'd pointer to dest_obj, which the caller must unmap */
 static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
-		       struct drm_i915_gem_object *src_obj)
+		       struct drm_i915_gem_object *src_obj,
+		       u32 batch_start_offset,
+		       u32 batch_len)
 {
 	int ret = 0;
 	int needs_clflush = 0;
-	u32 *src_addr, *dest_addr = NULL;
+	u32 *src_base, *dest_base = NULL;
+	u32 *src_addr, *dest_addr;
+	u32 offset = batch_start_offset / sizeof(*dest_addr);
+	u32 end = batch_start_offset + batch_len;
+
+	if (end > dest_obj->base.size || end > src_obj->base.size)
+		return ERR_PTR(-E2BIG);
 
 	ret = i915_gem_obj_prepare_shmem_read(src_obj, &needs_clflush);
 	if (ret) {
@@ -854,15 +862,17 @@ static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
 		return ERR_PTR(ret);
 	}
 
-	src_addr = vmap_batch(src_obj);
-	if (!src_addr) {
+	src_base = vmap_batch(src_obj);
+	if (!src_base) {
 		DRM_DEBUG_DRIVER("CMD: Failed to vmap batch\n");
 		ret = -ENOMEM;
 		goto unpin_src;
 	}
 
+	src_addr = src_base + offset;
+
 	if (needs_clflush)
-		drm_clflush_virt_range((char *)src_addr, src_obj->base.size);
+		drm_clflush_virt_range((char *)src_addr, batch_len);
 
 	ret = i915_gem_object_set_to_cpu_domain(dest_obj, true);
 	if (ret) {
@@ -870,24 +880,27 @@ static u32 *copy_batch(struct drm_i915_gem_object *dest_obj,
 		goto unmap_src;
 	}
 
-	dest_addr = vmap_batch(dest_obj);
-	if (!dest_addr) {
+	dest_base = vmap_batch(dest_obj);
+	if (!dest_base) {
 		DRM_DEBUG_DRIVER("CMD: Failed to vmap shadow batch\n");
 		ret = -ENOMEM;
 		goto unmap_src;
 	}
 
-	memcpy(dest_addr, src_addr, src_obj->base.size);
-	if (dest_obj->base.size > src_obj->base.size)
-		memset((u8 *)dest_addr + src_obj->base.size, 0,
-		       dest_obj->base.size - src_obj->base.size);
+	dest_addr = dest_base + offset;
+
+	if (batch_start_offset != 0)
+		memset((u8 *)dest_base, 0, batch_start_offset);
+
+	memcpy(dest_addr, src_addr, batch_len);
+	memset((u8 *)dest_addr + batch_len, 0, dest_obj->base.size - end);
 
 unmap_src:
-	vunmap(src_addr);
+	vunmap(src_base);
 unpin_src:
 	i915_gem_object_unpin_pages(src_obj);
 
-	return ret ? ERR_PTR(ret) : dest_addr;
+	return ret ? ERR_PTR(ret) : dest_base;
 }
 
 /**
@@ -1008,6 +1021,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
  * @batch_obj: the batch buffer in question
  * @shadow_batch_obj: copy of the batch buffer in question
  * @batch_start_offset: byte offset in the batch at which execution starts
+ * @batch_len: length of the commands in batch_obj
  * @is_master: is the submitting process the drm master?
  *
  * Parses the specified batch buffer looking for privilege violations as
@@ -1020,6 +1034,7 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 		    struct drm_i915_gem_object *batch_obj,
 		    struct drm_i915_gem_object *shadow_batch_obj,
 		    u32 batch_start_offset,
+		    u32 batch_len,
 		    bool is_master)
 {
 	int ret = 0;
@@ -1027,7 +1042,8 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 	struct drm_i915_cmd_descriptor default_desc = { 0 };
 	bool oacontrol_set = false; /* OACONTROL tracking. See check_cmd() */
 
-	batch_base = copy_batch(shadow_batch_obj, batch_obj);
+	batch_base = copy_batch(shadow_batch_obj, batch_obj,
+				batch_start_offset, batch_len);
 	if (IS_ERR(batch_base)) {
 		DRM_DEBUG_DRIVER("CMD: Failed to copy batch\n");
 		return PTR_ERR(batch_base);
@@ -1036,11 +1052,11 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 	cmd = batch_base + (batch_start_offset / sizeof(*cmd));
 
 	/*
-	 * We use the source object's size because the shadow object is as
+	 * We use the batch length as size because the shadow object is as
 	 * large or larger and copy_batch() will write MI_NOPs to the extra
 	 * space. Parsing should be faster in some cases this way.
 	 */
-	batch_end = cmd + (batch_obj->base.size / sizeof(*batch_end));
+	batch_end = cmd + (batch_len / sizeof(*batch_end));
 
 	while (cmd < batch_end) {
 		const struct drm_i915_cmd_descriptor *desc;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 490978e..3772fbe 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2880,6 +2880,7 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 		    struct drm_i915_gem_object *batch_obj,
 		    struct drm_i915_gem_object *shadow_batch_obj,
 		    u32 batch_start_offset,
+		    u32 batch_len,
 		    bool is_master);
 
 /* i915_suspend.c */
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 66e0a6a..76ae2da 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1380,6 +1380,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 				      batch_obj,
 				      shadow_batch_obj,
 				      args->batch_start_offset,
+				      args->batch_len,
 				      file->is_master);
 		i915_gem_object_ggtt_unpin(shadow_batch_obj);
 
-- 
1.9.1

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[PATCH v5 6/7] drm/i915: Mark shadow batch buffers as purgeable

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

By adding a new exec_entry flag, we cleanly mark the shadow objects
as purgeable after they are on the active list.

v2:
- Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
  fnc (danvet, from v4 6/7 feedback)

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_batch_pool.c |  2 ++
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 ++++++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_batch_pool.c b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
index ccbe8f9..01333bf 100644
--- a/drivers/gpu/drm/i915/i915_gem_batch_pool.c
+++ b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
@@ -146,6 +146,8 @@ i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,
 		list_add_tail(&obj->batch_pool_list, &pool->inactive_list);
 	}
 
+	obj->madv = I915_MADV_WILLNEED;
+
 	list_move_tail(&obj->batch_pool_list, &pool->active_list);
 
 	return obj;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 76ae2da..07b952f 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -37,6 +37,7 @@
 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 #define  __EXEC_OBJECT_NEEDS_MAP (1<<29)
 #define  __EXEC_OBJECT_NEEDS_BIAS (1<<28)
+#define  __EXEC_OBJECT_PURGEABLE (1<<27)
 
 #define BATCH_OFFSET_BIAS (256*1024)
 
@@ -223,7 +224,12 @@ i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 		vma->pin_count--;
 
-	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
+	if (entry->flags & __EXEC_OBJECT_PURGEABLE)
+		obj->madv = I915_MADV_DONTNEED;
+
+	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE |
+			  __EXEC_OBJECT_HAS_PIN |
+			  __EXEC_OBJECT_PURGEABLE);
 }
 
 static void eb_destroy(struct eb_vmas *eb)
@@ -1372,6 +1378,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 			goto err;
 		}
 
+		shadow_batch_obj->madv = I915_MADV_WILLNEED;
+
 		ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0);
 		if (ret)
 			goto err;
@@ -1395,6 +1403,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 
 			vma = i915_gem_obj_to_ggtt(shadow_batch_obj);
 			vma->exec_entry = &shadow_exec_entry;
+			vma->exec_entry->flags = __EXEC_OBJECT_PURGEABLE;
 			drm_gem_object_reference(&shadow_batch_obj->base);
 			list_add_tail(&vma->exec_list, &eb->vmas);
 
-- 
1.9.1

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[PATCH v5 7/7] drm/i915: Tidy up execbuffer command parsing code

[michael.h.nguyen]

From: Brad Volkin <bradley.d.volkin@intel.com>

Move it to a separate function since the main do_execbuffer function
already has so much going on.

v2:
- Move pin/unpin calls inside i915_parse_cmds() (Chris W, v4 7/7
  feedback)

Issue: VIZ-4719
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c     |   8 ++
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 127 ++++++++++++++++-------------
 2 files changed, 78 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 489ff43..eecbfcb 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -1042,10 +1042,17 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 	struct drm_i915_cmd_descriptor default_desc = { 0 };
 	bool oacontrol_set = false; /* OACONTROL tracking. See check_cmd() */
 
+	ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0);
+	if (ret) {
+		DRM_DEBUG_DRIVER("CMD: Failed to pin shadow batch\n");
+		return -1;
+	}
+
 	batch_base = copy_batch(shadow_batch_obj, batch_obj,
 				batch_start_offset, batch_len);
 	if (IS_ERR(batch_base)) {
 		DRM_DEBUG_DRIVER("CMD: Failed to copy batch\n");
+		i915_gem_object_ggtt_unpin(shadow_batch_obj);
 		return PTR_ERR(batch_base);
 	}
 
@@ -1116,6 +1123,7 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
 	}
 
 	vunmap(batch_base);
+	i915_gem_object_ggtt_unpin(shadow_batch_obj);
 
 	return ret;
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 07b952f..bef9bcd 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1026,6 +1026,66 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 	return 0;
 }
 
+static struct drm_i915_gem_object*
+i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
+			  struct drm_i915_gem_exec_object2 *shadow_exec_entry,
+			  struct eb_vmas *eb,
+			  struct drm_i915_gem_object *batch_obj,
+			  u32 batch_start_offset,
+			  u32 batch_len,
+			  bool is_master,
+			  u32 *flags)
+{
+	struct drm_i915_private *dev_priv = to_i915(batch_obj->base.dev);
+	struct drm_i915_gem_object *shadow_batch_obj;
+	int ret;
+
+	shadow_batch_obj = i915_gem_batch_pool_get(&dev_priv->mm.batch_pool,
+						   batch_obj->base.size);
+	if (IS_ERR(shadow_batch_obj))
+		return shadow_batch_obj;
+
+	ret = i915_parse_cmds(ring,
+			      batch_obj,
+			      shadow_batch_obj,
+			      batch_start_offset,
+			      batch_len,
+			      is_master);
+	if (ret) {
+		if (ret == -EACCES)
+			return batch_obj;
+	} else {
+		struct i915_vma *vma;
+
+		memset(shadow_exec_entry, 0, sizeof(*shadow_exec_entry));
+
+		vma = i915_gem_obj_to_ggtt(shadow_batch_obj);
+		vma->exec_entry = shadow_exec_entry;
+		vma->exec_entry->flags = __EXEC_OBJECT_PURGEABLE;
+		drm_gem_object_reference(&shadow_batch_obj->base);
+		list_add_tail(&vma->exec_list, &eb->vmas);
+
+		shadow_batch_obj->base.pending_read_domains =
+			batch_obj->base.pending_read_domains;
+
+		/*
+		 * Set the DISPATCH_SECURE bit to remove the NON_SECURE
+		 * bit from MI_BATCH_BUFFER_START commands issued in the
+		 * dispatch_execbuffer implementations. We specifically
+		 * don't want that set when the command parser is
+		 * enabled.
+		 *
+		 * FIXME: with aliasing ppgtt, buffers that should only
+		 * be in ggtt still end up in the aliasing ppgtt. remove
+		 * this check when that is fixed.
+		 */
+		if (USES_FULL_PPGTT(dev))
+			*flags |= I915_DISPATCH_SECURE;
+	}
+
+	return ret ? ERR_PTR(ret) : shadow_batch_obj;
+}
+
 int
 i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 			       struct intel_engine_cs *ring,
@@ -1242,7 +1302,6 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct eb_vmas *eb;
 	struct drm_i915_gem_object *batch_obj;
-	struct drm_i915_gem_object *shadow_batch_obj = NULL;
 	struct drm_i915_gem_exec_object2 shadow_exec_entry;
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
@@ -1368,63 +1427,17 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	}
 
 	if (i915_needs_cmd_parser(ring)) {
-		shadow_batch_obj =
-			i915_gem_batch_pool_get(&dev_priv->mm.batch_pool,
-						batch_obj->base.size);
-		if (IS_ERR(shadow_batch_obj)) {
-			ret = PTR_ERR(shadow_batch_obj);
-			/* Don't try to clean up the obj in the error path */
-			shadow_batch_obj = NULL;
-			goto err;
-		}
-
-		shadow_batch_obj->madv = I915_MADV_WILLNEED;
-
-		ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0);
-		if (ret)
+		batch_obj = i915_gem_execbuffer_parse(ring,
+						      &shadow_exec_entry,
+						      eb,
+						      batch_obj,
+						      args->batch_start_offset,
+						      args->batch_len,
+						      file->is_master,
+						      &flags);
+		if (IS_ERR(batch_obj)) {
+			ret = PTR_ERR(batch_obj);
 			goto err;
-
-		ret = i915_parse_cmds(ring,
-				      batch_obj,
-				      shadow_batch_obj,
-				      args->batch_start_offset,
-				      args->batch_len,
-				      file->is_master);
-		i915_gem_object_ggtt_unpin(shadow_batch_obj);
-
-		if (ret) {
-			if (ret != -EACCES)
-				goto err;
-		} else {
-			struct i915_vma *vma;
-
-			memset(&shadow_exec_entry, 0,
-			       sizeof(shadow_exec_entry));
-
-			vma = i915_gem_obj_to_ggtt(shadow_batch_obj);
-			vma->exec_entry = &shadow_exec_entry;
-			vma->exec_entry->flags = __EXEC_OBJECT_PURGEABLE;
-			drm_gem_object_reference(&shadow_batch_obj->base);
-			list_add_tail(&vma->exec_list, &eb->vmas);
-
-			shadow_batch_obj->base.pending_read_domains =
-				batch_obj->base.pending_read_domains;
-
-			batch_obj = shadow_batch_obj;
-
-			/*
-			 * Set the DISPATCH_SECURE bit to remove the NON_SECURE
-			 * bit from MI_BATCH_BUFFER_START commands issued in the
-			 * dispatch_execbuffer implementations. We specifically
-			 * don't want that set when the command parser is
-			 * enabled.
-			 *
-			 * FIXME: with aliasing ppgtt, buffers that should only
-			 * be in ggtt still end up in the aliasing ppgtt. remove
-			 * this check when that is fixed.
-			 */
-			if (USES_FULL_PPGTT(dev))
-				flags |= I915_DISPATCH_SECURE;
 		}
 	}
 
-- 
1.9.1

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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Chris Wilson]

On Wed, Nov 26, 2014 at 01:53:34PM -0800, michael.h.nguyen@intel.com wrote:
> From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
> 
> This is v5 of the series sent here:
> http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html
> 
> This version incorporates the following feedback from v4. 
> 
> - 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
>   parser (danvet)
> - 1/7 Move purged check inside the loop (danvet)
> - 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
>   fnc (danvet)
> - 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)
> 
> Issue: VIZ-4719
> Brad Volkin (7):
>   drm/i915: Implement a framework for batch buffer pools
>   drm/i915: Use batch pools with the command parser
>   drm/i915: Add a batch pool debugfs file
>   drm/i915: Add batch pool details to i915_gem_objects debugfs
>   drm/i915: Use batch length instead of object size in command parser
>   drm/i915: Mark shadow batch buffers as purgeable
>   drm/i915: Tidy up execbuffer command parsing code

This still does not incorporate the feedback from the last N cycles.

Chiefly: A single cache list, madvise on creation, and squash the
framework and debugging patches into one.
-Chris

-- 
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Michael H. Nguyen]

On 11/26/2014 11:44 PM, Chris Wilson wrote:
> On Wed, Nov 26, 2014 at 01:53:34PM -0800, michael.h.nguyen@intel.com wrote:
>> From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
>>
>> This is v5 of the series sent here:
>> http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html
>>
>> This version incorporates the following feedback from v4.
>>
>> - 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
>>    parser (danvet)
>> - 1/7 Move purged check inside the loop (danvet)
>> - 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
>>    fnc (danvet)
>> - 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)
>>
>> Issue: VIZ-4719
>> Brad Volkin (7):
>>    drm/i915: Implement a framework for batch buffer pools
>>    drm/i915: Use batch pools with the command parser
>>    drm/i915: Add a batch pool debugfs file
>>    drm/i915: Add batch pool details to i915_gem_objects debugfs
>>    drm/i915: Use batch length instead of object size in command parser
>>    drm/i915: Mark shadow batch buffers as purgeable
>>    drm/i915: Tidy up execbuffer command parsing code
>
> This still does not incorporate the feedback from the last N cycles.
>
> Chiefly: A single cache list, madvise on creation, and squash the
> framework and debugging patches into one.

Re: single cache list

OK. Found the feedback in an old rev.

Re: madvise on creation

Were you referring to this?

from 
http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm

	obj = i915_gem_obj_alloc();
	i915_gem_object_get_pages(obj);
	obj->madv = I915_MADV_DONTNEED;

If so, I don't understand . _get is returning obj and it'll be needed so 
would expect to set 'obj->madv = I915_MADV_WILLNEED' which is the case now.

For this feedback, would appreciate it if you could provide comments or 
proposed solutions in line w/ source. That would be helpful for me to 
get whatever context I'm missing.

Re: Squash

OK. I didn't see this feedback. Will do.

Thanks,
-Mike

> -Chris
>
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Daniel Vetter]

On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> 
> 
> On 11/26/2014 11:44 PM, Chris Wilson wrote:
> >On Wed, Nov 26, 2014 at 01:53:34PM -0800, michael.h.nguyen@intel.com wrote:
> >>From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
> >>
> >>This is v5 of the series sent here:
> >>http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html
> >>
> >>This version incorporates the following feedback from v4.
> >>
> >>- 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
> >>   parser (danvet)
> >>- 1/7 Move purged check inside the loop (danvet)
> >>- 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
> >>   fnc (danvet)
> >>- 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)
> >>
> >>Issue: VIZ-4719
> >>Brad Volkin (7):
> >>   drm/i915: Implement a framework for batch buffer pools
> >>   drm/i915: Use batch pools with the command parser
> >>   drm/i915: Add a batch pool debugfs file
> >>   drm/i915: Add batch pool details to i915_gem_objects debugfs
> >>   drm/i915: Use batch length instead of object size in command parser
> >>   drm/i915: Mark shadow batch buffers as purgeable
> >>   drm/i915: Tidy up execbuffer command parsing code
> >
> >This still does not incorporate the feedback from the last N cycles.
> >
> >Chiefly: A single cache list, madvise on creation, and squash the
> >framework and debugging patches into one.
> 
> Re: single cache list
> 
> OK. Found the feedback in an old rev.

Btw in your patch you have a fancy retry loop looking at was_purged. On a
quick look that shouldn't be needed and a simple list-walk should be all
you need I think.
-Daniel
-- 
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Michael H. Nguyen]

On 12/02/2014 01:45 AM, Daniel Vetter wrote:
> On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
>>
>>
>> On 11/26/2014 11:44 PM, Chris Wilson wrote:
>>> On Wed, Nov 26, 2014 at 01:53:34PM -0800, michael.h.nguyen@intel.com wrote:
>>>> From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
>>>>
>>>> This is v5 of the series sent here:
>>>> http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html
>>>>
>>>> This version incorporates the following feedback from v4.
>>>>
>>>> - 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
>>>>    parser (danvet)
>>>> - 1/7 Move purged check inside the loop (danvet)
>>>> - 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
>>>>    fnc (danvet)
>>>> - 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)
>>>>
>>>> Issue: VIZ-4719
>>>> Brad Volkin (7):
>>>>    drm/i915: Implement a framework for batch buffer pools
>>>>    drm/i915: Use batch pools with the command parser
>>>>    drm/i915: Add a batch pool debugfs file
>>>>    drm/i915: Add batch pool details to i915_gem_objects debugfs
>>>>    drm/i915: Use batch length instead of object size in command parser
>>>>    drm/i915: Mark shadow batch buffers as purgeable
>>>>    drm/i915: Tidy up execbuffer command parsing code
>>>
>>> This still does not incorporate the feedback from the last N cycles.
>>>
>>> Chiefly: A single cache list, madvise on creation, and squash the
>>> framework and debugging patches into one.
>>
>> Re: single cache list
>>
>> OK. Found the feedback in an old rev.
>
> Btw in your patch you have a fancy retry loop looking at was_purged. On a
> quick look that shouldn't be needed and a simple list-walk should be all
> you need I think.

Right. That has been there for a couple of rev's. I have it addressed in 
the RFC sent to you and Chris privately. Let me know if what I sent 
isn't want you were hoping for.

> -Daniel
>
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Daniel Vetter]

On Tue, Dec 02, 2014 at 11:10:24AM -0800, Michael H. Nguyen wrote:
> 
> 
> On 12/02/2014 01:45 AM, Daniel Vetter wrote:
> >On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> >>
> >>
> >>On 11/26/2014 11:44 PM, Chris Wilson wrote:
> >>>On Wed, Nov 26, 2014 at 01:53:34PM -0800, michael.h.nguyen@intel.com wrote:
> >>>>From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
> >>>>
> >>>>This is v5 of the series sent here:
> >>>>http://lists.freedesktop.org/archives/intel-gfx/2014-November/055141.html
> >>>>
> >>>>This version incorporates the following feedback from v4.
> >>>>
> >>>>- 0/7 Move 'pending_read_domains |= I915_GEM_DOMAIN_COMMAND' after the
> >>>>   parser (danvet)
> >>>>- 1/7 Move purged check inside the loop (danvet)
> >>>>- 6/7 Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
> >>>>   fnc (danvet)
> >>>>- 7/7 Move pin/unpin calls inside i915_parse_cmds() (Chris W)
> >>>>
> >>>>Issue: VIZ-4719
> >>>>Brad Volkin (7):
> >>>>   drm/i915: Implement a framework for batch buffer pools
> >>>>   drm/i915: Use batch pools with the command parser
> >>>>   drm/i915: Add a batch pool debugfs file
> >>>>   drm/i915: Add batch pool details to i915_gem_objects debugfs
> >>>>   drm/i915: Use batch length instead of object size in command parser
> >>>>   drm/i915: Mark shadow batch buffers as purgeable
> >>>>   drm/i915: Tidy up execbuffer command parsing code
> >>>
> >>>This still does not incorporate the feedback from the last N cycles.
> >>>
> >>>Chiefly: A single cache list, madvise on creation, and squash the
> >>>framework and debugging patches into one.
> >>
> >>Re: single cache list
> >>
> >>OK. Found the feedback in an old rev.
> >
> >Btw in your patch you have a fancy retry loop looking at was_purged. On a
> >quick look that shouldn't be needed and a simple list-walk should be all
> >you need I think.
> 
> Right. That has been there for a couple of rev's. I have it addressed in the
> RFC sent to you and Chris privately. Let me know if what I sent isn't want
> you were hoping for.

Oops, deleted those mails already since I assumed it's a dupe from public
mailing lists (I have separate mail accounts for that).

If you want quick informal review just ping on irc with a pointer to a git
repo or pastebin or something. Otherwise I just prefer direct mailing list
submissions. Private communication needlessly excludes everyone else.
-Daniel
-- 
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Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Chris Wilson]

On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> Re: madvise on creation
> 
> Were you referring to this?
> 
> from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
> 
> 	obj = i915_gem_obj_alloc();
> 	i915_gem_object_get_pages(obj);
> 	obj->madv = I915_MADV_DONTNEED;
> 
> If so, I don't understand . _get is returning obj and it'll be
> needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
> is the case now.

madv is only evaluated at get_pages(). Once you have the pages, you keep
them until the shrinker purges them. Hence you only need to call
get_pages() once and set obj->madv = DONTNEED afterwards, and then you
only need to check whether the obj is purged before your next reuse (you
do not need to touch madv ever again). Whilst the object is active it is
a low priority target for the shrinker. That greatly simplifies the pool
code.
-Chris

-- 
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Daniel Vetter]

On Tue, Dec 02, 2014 at 11:13:48AM +0000, Chris Wilson wrote:
> On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> > Re: madvise on creation
> > 
> > Were you referring to this?
> > 
> > from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
> > 
> > 	obj = i915_gem_obj_alloc();
> > 	i915_gem_object_get_pages(obj);
> > 	obj->madv = I915_MADV_DONTNEED;
> > 
> > If so, I don't understand . _get is returning obj and it'll be
> > needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
> > is the case now.
> 
> madv is only evaluated at get_pages(). Once you have the pages, you keep
> them until the shrinker purges them. Hence you only need to call
> get_pages() once and set obj->madv = DONTNEED afterwards, and then you
> only need to check whether the obj is purged before your next reuse (you
> do not need to touch madv ever again). Whilst the object is active it is
> a low priority target for the shrinker. That greatly simplifies the pool
> code.

Well we must pin the pages while the obj/vma hasn't yet transferred to the
active list (like all execbuf objs). Otherwise someone might steal this at
the next allocation point. But that's really just to clarify the
implications of what Chris explained here, iirc the current shadow copy
code should take care of all that (with the pending review on Brad's last
version addressed ofc).
-Daniel
-- 
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Michael H. Nguyen]

On 12/02/2014 03:13 AM, Chris Wilson wrote:
> On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
>> Re: madvise on creation
>>
>> Were you referring to this?
>>
>> from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
>>
>> 	obj = i915_gem_obj_alloc();
>> 	i915_gem_object_get_pages(obj);
>> 	obj->madv = I915_MADV_DONTNEED;
>>
>> If so, I don't understand . _get is returning obj and it'll be
>> needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
>> is the case now.
> 
> madv is only evaluated at get_pages(). Once you have the pages, you keep
> them until the shrinker purges them. Hence you only need to call
> get_pages() once and set obj->madv = DONTNEED afterwards, and then you
> only need to check whether the obj is purged before your next reuse (you
> do not need to touch madv ever again). Whilst the object is active it is
> a low priority target for the shrinker. That greatly simplifies the pool
> code.

I have a feeling this may make the driver less readable imo and could also require a re-write of the series. The current code may call get_pages() more than once and occurs outside of the batch_pool management fncs. Would have to re-write things to stop that.

i915_parse_cmds()
  copy_batch()
    i915_gem_obj_prepare_shmem_read()
      i915_gem_object_get_pages()

After removing the fancy retry loop suggested by Daniel and moving to a single cache list, the implementation looks very simple imo. And, setting 'obj->madv = I915_MADV_WILLNEED;' looks right. Readability wise, you don't have to investigate further to understand the justification for that statement. Here is an RFC snippet...

i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,    
                        size_t size)
{  
        struct drm_i915_gem_object *obj = NULL;
        struct drm_i915_gem_object *tmp, *next;
   
        WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
   
        list_for_each_entry_safe(tmp, next,
                        &pool->cache_list, batch_pool_list) {
   
                if (tmp->active)
                        continue;
          
                if (tmp->madv == __I915_MADV_PURGED) {                      
                        list_del(&tmp->batch_pool_list);                    
                        drm_gem_object_unreference(&tmp->base);             
                        continue;
                }
   
                if (tmp->base.size >= size &&
                    tmp->base.size <= (2 * size)) {
                        obj = tmp;
                        break;
                }
        }

        if (!obj) {
                obj = i915_gem_alloc_object(pool->dev, size);
                if (!obj)
                        return ERR_PTR(-ENOMEM);

                list_add_tail(&obj->batch_pool_list, &pool->cache_list);
        }

        obj->madv = I915_MADV_WILLNEED;

        return obj;
}

Given the spirit of your feedback was to simplify pool_get(), does this RFC do it for you? If not, I kindly request we have a sync up meeting to discuss your 'obj->madv = DONTNEED' suggestion.

Thank you much,
-Mike

> -Chris
> 
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Daniel Vetter]

On Tue, Dec 02, 2014 at 01:57:32PM -0800, Michael H. Nguyen wrote:
> 
> 
> On 12/02/2014 03:13 AM, Chris Wilson wrote:
> > On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> >> Re: madvise on creation
> >>
> >> Were you referring to this?
> >>
> >> from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
> >>
> >> 	obj = i915_gem_obj_alloc();
> >> 	i915_gem_object_get_pages(obj);
> >> 	obj->madv = I915_MADV_DONTNEED;
> >>
> >> If so, I don't understand . _get is returning obj and it'll be
> >> needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
> >> is the case now.
> > 
> > madv is only evaluated at get_pages(). Once you have the pages, you keep
> > them until the shrinker purges them. Hence you only need to call
> > get_pages() once and set obj->madv = DONTNEED afterwards, and then you
> > only need to check whether the obj is purged before your next reuse (you
> > do not need to touch madv ever again). Whilst the object is active it is
> > a low priority target for the shrinker. That greatly simplifies the pool
> > code.
> 
> I have a feeling this may make the driver less readable imo and could
> also require a re-write of the series. The current code may call
> get_pages() more than once and occurs outside of the batch_pool
> management fncs. Would have to re-write things to stop that.
> 
> i915_parse_cmds()
>   copy_batch()
>     i915_gem_obj_prepare_shmem_read()
>       i915_gem_object_get_pages()
> 
> After removing the fancy retry loop suggested by Daniel and moving to a
> single cache list, the implementation looks very simple imo. And,
> setting 'obj->madv = I915_MADV_WILLNEED;' looks right. Readability wise,
> you don't have to investigate further to understand the justification
> for that statement. Here is an RFC snippet...
> 
> i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,    
>                         size_t size)
> {  
>         struct drm_i915_gem_object *obj = NULL;
>         struct drm_i915_gem_object *tmp, *next;
>    
>         WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
>    
>         list_for_each_entry_safe(tmp, next,
>                         &pool->cache_list, batch_pool_list) {
>    
>                 if (tmp->active)
>                         continue;
>           
>                 if (tmp->madv == __I915_MADV_PURGED) {                      
>                         list_del(&tmp->batch_pool_list);                    
>                         drm_gem_object_unreference(&tmp->base);             
>                         continue;
>                 }
>    
>                 if (tmp->base.size >= size &&
>                     tmp->base.size <= (2 * size)) {
>                         obj = tmp;
>                         break;
>                 }
>         }
> 
>         if (!obj) {
>                 obj = i915_gem_alloc_object(pool->dev, size);
>                 if (!obj)
>                         return ERR_PTR(-ENOMEM);
> 
>                 list_add_tail(&obj->batch_pool_list, &pool->cache_list);
>         }
> 
>         obj->madv = I915_MADV_WILLNEED;
> 
>         return obj;
> }
> 
> Given the spirit of your feedback was to simplify pool_get(), does this
> RFC do it for you? If not, I kindly request we have a sync up meeting to
> discuss your 'obj->madv = DONTNEED' suggestion.

Yeah I think this looks good. And setting DONTNEED should imo be done in
the _put function, which we do right away in execbuf (after having pushed
the shadow batch to the active list to make sure it doesn't disappear too
quickly). Maybe I'm misunderstanding what Chris means, but setting
DONTNEED right away in _get is too early and needs a lot more care in
users of the batch pool like you point out. It's also not how libdrm does
use the madv settings.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Chris Wilson]

On Wed, Dec 03, 2014 at 10:17:32AM +0100, Daniel Vetter wrote:
> On Tue, Dec 02, 2014 at 01:57:32PM -0800, Michael H. Nguyen wrote:
> > 
> > 
> > On 12/02/2014 03:13 AM, Chris Wilson wrote:
> > > On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> > >> Re: madvise on creation
> > >>
> > >> Were you referring to this?
> > >>
> > >> from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
> > >>
> > >> 	obj = i915_gem_obj_alloc();
> > >> 	i915_gem_object_get_pages(obj);
> > >> 	obj->madv = I915_MADV_DONTNEED;
> > >>
> > >> If so, I don't understand . _get is returning obj and it'll be
> > >> needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
> > >> is the case now.
> > > 
> > > madv is only evaluated at get_pages(). Once you have the pages, you keep
> > > them until the shrinker purges them. Hence you only need to call
> > > get_pages() once and set obj->madv = DONTNEED afterwards, and then you
> > > only need to check whether the obj is purged before your next reuse (you
> > > do not need to touch madv ever again). Whilst the object is active it is
> > > a low priority target for the shrinker. That greatly simplifies the pool
> > > code.
> > 
> > I have a feeling this may make the driver less readable imo and could
> > also require a re-write of the series. The current code may call
> > get_pages() more than once and occurs outside of the batch_pool
> > management fncs. Would have to re-write things to stop that.
> > 
> > i915_parse_cmds()
> >   copy_batch()
> >     i915_gem_obj_prepare_shmem_read()
> >       i915_gem_object_get_pages()
> > 
> > After removing the fancy retry loop suggested by Daniel and moving to a
> > single cache list, the implementation looks very simple imo. And,
> > setting 'obj->madv = I915_MADV_WILLNEED;' looks right. Readability wise,
> > you don't have to investigate further to understand the justification
> > for that statement. Here is an RFC snippet...
> > 
> > i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,    
> >                         size_t size)
> > {  
> >         struct drm_i915_gem_object *obj = NULL;
> >         struct drm_i915_gem_object *tmp, *next;
> >    
> >         WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
> >    
> >         list_for_each_entry_safe(tmp, next,
> >                         &pool->cache_list, batch_pool_list) {
> >    
> >                 if (tmp->active)
> >                         continue;
> >           
> >                 if (tmp->madv == __I915_MADV_PURGED) {                      
> >                         list_del(&tmp->batch_pool_list);                    
> >                         drm_gem_object_unreference(&tmp->base);             
> >                         continue;
> >                 }
> >    
> >                 if (tmp->base.size >= size &&
> >                     tmp->base.size <= (2 * size)) {
> >                         obj = tmp;
> >                         break;
> >                 }
> >         }
> > 
> >         if (!obj) {
> >                 obj = i915_gem_alloc_object(pool->dev, size);
> >                 if (!obj)
> >                         return ERR_PTR(-ENOMEM);
> > 
> >                 list_add_tail(&obj->batch_pool_list, &pool->cache_list);
> >         }
> > 
> >         obj->madv = I915_MADV_WILLNEED;
> > 
> >         return obj;
> > }
> > 
> > Given the spirit of your feedback was to simplify pool_get(), does this
> > RFC do it for you? If not, I kindly request we have a sync up meeting to
> > discuss your 'obj->madv = DONTNEED' suggestion.
> 
> Yeah I think this looks good. And setting DONTNEED should imo be done in
> the _put function, which we do right away in execbuf (after having pushed
> the shadow batch to the active list to make sure it doesn't disappear too
> quickly).

It can't disappear as we should have the pages pinned.

> Maybe I'm misunderstanding what Chris means, but setting
> DONTNEED right away in _get is too early and needs a lot more care in
> users of the batch pool like you point out. It's also not how libdrm does
> use the madv settings.

No, it is not. You need exactly the same care either way. The shrinker
will steal WILLNEED pages if it has to... Only pinning prevents the
shrinker from reaping the shadow_obj. And use pin_pages not ggtt_pin for
that purpose!
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [PATCH v5 0/7] Command parser batch buffer copy

[Daniel Vetter]

On Wed, Dec 03, 2014 at 09:31:37AM +0000, Chris Wilson wrote:
> On Wed, Dec 03, 2014 at 10:17:32AM +0100, Daniel Vetter wrote:
> > On Tue, Dec 02, 2014 at 01:57:32PM -0800, Michael H. Nguyen wrote:
> > > 
> > > 
> > > On 12/02/2014 03:13 AM, Chris Wilson wrote:
> > > > On Mon, Dec 01, 2014 at 02:39:51PM -0800, Michael H. Nguyen wrote:
> > > >> Re: madvise on creation
> > > >>
> > > >> Were you referring to this?
> > > >>
> > > >> from http://lists.freedesktop.org/archives/intel-gfx/2014-November/055060.htm
> > > >>
> > > >> 	obj = i915_gem_obj_alloc();
> > > >> 	i915_gem_object_get_pages(obj);
> > > >> 	obj->madv = I915_MADV_DONTNEED;
> > > >>
> > > >> If so, I don't understand . _get is returning obj and it'll be
> > > >> needed so would expect to set 'obj->madv = I915_MADV_WILLNEED' which
> > > >> is the case now.
> > > > 
> > > > madv is only evaluated at get_pages(). Once you have the pages, you keep
> > > > them until the shrinker purges them. Hence you only need to call
> > > > get_pages() once and set obj->madv = DONTNEED afterwards, and then you
> > > > only need to check whether the obj is purged before your next reuse (you
> > > > do not need to touch madv ever again). Whilst the object is active it is
> > > > a low priority target for the shrinker. That greatly simplifies the pool
> > > > code.
> > > 
> > > I have a feeling this may make the driver less readable imo and could
> > > also require a re-write of the series. The current code may call
> > > get_pages() more than once and occurs outside of the batch_pool
> > > management fncs. Would have to re-write things to stop that.
> > > 
> > > i915_parse_cmds()
> > >   copy_batch()
> > >     i915_gem_obj_prepare_shmem_read()
> > >       i915_gem_object_get_pages()
> > > 
> > > After removing the fancy retry loop suggested by Daniel and moving to a
> > > single cache list, the implementation looks very simple imo. And,
> > > setting 'obj->madv = I915_MADV_WILLNEED;' looks right. Readability wise,
> > > you don't have to investigate further to understand the justification
> > > for that statement. Here is an RFC snippet...
> > > 
> > > i915_gem_batch_pool_get(struct i915_gem_batch_pool *pool,    
> > >                         size_t size)
> > > {  
> > >         struct drm_i915_gem_object *obj = NULL;
> > >         struct drm_i915_gem_object *tmp, *next;
> > >    
> > >         WARN_ON(!mutex_is_locked(&pool->dev->struct_mutex));
> > >    
> > >         list_for_each_entry_safe(tmp, next,
> > >                         &pool->cache_list, batch_pool_list) {
> > >    
> > >                 if (tmp->active)
> > >                         continue;
> > >           
> > >                 if (tmp->madv == __I915_MADV_PURGED) {                      
> > >                         list_del(&tmp->batch_pool_list);                    
> > >                         drm_gem_object_unreference(&tmp->base);             
> > >                         continue;
> > >                 }
> > >    
> > >                 if (tmp->base.size >= size &&
> > >                     tmp->base.size <= (2 * size)) {
> > >                         obj = tmp;
> > >                         break;
> > >                 }
> > >         }
> > > 
> > >         if (!obj) {
> > >                 obj = i915_gem_alloc_object(pool->dev, size);
> > >                 if (!obj)
> > >                         return ERR_PTR(-ENOMEM);
> > > 
> > >                 list_add_tail(&obj->batch_pool_list, &pool->cache_list);
> > >         }
> > > 
> > >         obj->madv = I915_MADV_WILLNEED;
> > > 
> > >         return obj;
> > > }
> > > 
> > > Given the spirit of your feedback was to simplify pool_get(), does this
> > > RFC do it for you? If not, I kindly request we have a sync up meeting to
> > > discuss your 'obj->madv = DONTNEED' suggestion.
> > 
> > Yeah I think this looks good. And setting DONTNEED should imo be done in
> > the _put function, which we do right away in execbuf (after having pushed
> > the shadow batch to the active list to make sure it doesn't disappear too
> > quickly).
> 
> It can't disappear as we should have the pages pinned.
> 
> > Maybe I'm misunderstanding what Chris means, but setting
> > DONTNEED right away in _get is too early and needs a lot more care in
> > users of the batch pool like you point out. It's also not how libdrm does
> > use the madv settings.
> 
> No, it is not. You need exactly the same care either way. The shrinker
> will steal WILLNEED pages if it has to... Only pinning prevents the
> shrinker from reaping the shadow_obj. And use pin_pages not ggtt_pin for
> that purpose!

We certainly need pin_pages after pool_get. But if we set PURGEABLE right
away the shrinker might throw away the backing storage before we get
around to pin it. And I don't see any benefit of doing things that way,
especially since the libdrm cache also only sets PURGEABLE after we've
filled the batch and everything (but before the batch is retired ofc).

So the sequence I see is
- pool_get (mad = WILLNEED)
- pin_pages
- uplaod scanned buffer
- unpin_pages
- throw onto active list
- pool_put (madv = PURGEABLE)
- return frome execbuf ioctl

Moving the madv = PURGEABLE up makes the pool internal resizing logic
needlessly leaky and I don't see any benefit. We need to call pool_put
anyway before returning from the ioctl. So any other thread _never_
observes the madv = WILLNEED state, it's only the shrinker which might
cause havoc.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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