From: nick <xerofoify@gmail.com>
To: daniel.vetter@intel.com
Cc: airlied@linux.ie, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Issues with Guessed macro values for registers in i915_reg.h
Date: Thu, 04 Dec 2014 12:55:48 -0500 [thread overview]
Message-ID: <5480A024.3030405@gmail.com> (raw)
Greetings Daniel and the other maintainers,
I am wondering if you have access to the hardware spec for these drivers supported by this header file. If you do
I would really appreciate the correct values for the registers pasted below as the person who wrote this code,
stated he guessed them. Due this they have the issue of most likely being wrong and may cause issues with functions
and code that use these macro values to work with these registers.
Cheers Nick
enum punit_power_well {
PUNIT_POWER_WELL_RENDER = 0,
PUNIT_POWER_WELL_MEDIA = 1,
PUNIT_POWER_WELL_DISP2D = 3,
PUNIT_POWER_WELL_DPIO_CMN_BC = 5,
PUNIT_POWER_WELL_DPIO_TX_B_LANES_01 = 6,
PUNIT_POWER_WELL_DPIO_TX_B_LANES_23 = 7,
PUNIT_POWER_WELL_DPIO_TX_C_LANES_01 = 8,
PUNIT_POWER_WELL_DPIO_TX_C_LANES_23 = 9,
PUNIT_POWER_WELL_DPIO_RX0 = 10,
PUNIT_POWER_WELL_DPIO_RX1 = 11,
PUNIT_POWER_WELL_DPIO_CMN_D = 12,
/* FIXME: guesswork below */
PUNIT_POWER_WELL_DPIO_TX_D_LANES_01 = 13,
PUNIT_POWER_WELL_DPIO_TX_D_LANES_23 = 14,
PUNIT_POWER_WELL_DPIO_RX2 = 15,
PUNIT_POWER_WELL_NUM,
};
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