From: Dave Gordon <david.s.gordon@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>,
Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/bdw: Fix the write setting up the WIZ hashing mode
Date: Mon, 08 Dec 2014 16:50:13 +0000 [thread overview]
Message-ID: <5485D6C5.8000801@intel.com> (raw)
In-Reply-To: <20141208162756.GA27182@phenom.ffwll.local>
On 08/12/14 16:27, Daniel Vetter wrote:
> On Mon, Dec 08, 2014 at 04:22:27PM +0000, Damien Lespiau wrote:
>> I was playing with clang and oh surprise! a warning trigerred by
>> -Wshift-overflow (gcc doesn't have this one):
[snip]
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index 79b4ca5..9deb152 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -739,6 +739,9 @@ static int wa_add(struct drm_i915_private *dev_priv,
>> #define WA_CLR_BIT_MASKED(addr, mask) \
>> WA_REG(addr, _MASKED_BIT_DISABLE(mask), (mask) & 0xffff)
>>
>> +#define WA_SET_FIELD_MASKED(addr, mask, value) \
>> + WA_REG(addr, _MASKED_FIELD(mask, value), mask)
>> +
>> #define WA_SET_BIT(addr, mask) WA_REG(addr, I915_READ(addr) | (mask), mask)
>> #define WA_CLR_BIT(addr, mask) WA_REG(addr, I915_READ(addr) & ~(mask), mask)
Not your changes, but:
* WA_{SET,CLR}_BIT() above look dubious and don't seem to be used anyway
* dev_priv->workarounds.reg[idx].mask = mask;
The mask field is set but not used in intel_ring_workarounds_emit() or
intel_logical_ring_workarounds_emit(), only in debugfs printout.
And it's redundant since the 'value' incorporates the bit(field) mask
and the new target value into one parameter, hence 3rd parameter of
WA_REG() is surplus and calculating it in WA_{SET,CLR_BIT_MASKED() is
also redundant.
Unless I've missed something?
.Dave.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-12-08 16:53 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-06 20:14 [PATCH] drm/i915/bdw: Fix the write setting up the WIZ hashing mode Damien Lespiau
2014-12-07 4:48 ` shuang.he
2014-12-08 12:33 ` Jani Nikula
2014-12-08 13:59 ` Damien Lespiau
2014-12-08 14:17 ` Dave Gordon
2014-12-08 14:36 ` Damien Lespiau
2014-12-08 14:21 ` Daniel Vetter
2014-12-08 14:23 ` Daniel Vetter
2014-12-08 14:46 ` Damien Lespiau
2014-12-08 16:22 ` [PATCH v2] " Damien Lespiau
2014-12-08 16:27 ` Daniel Vetter
2014-12-08 16:50 ` Dave Gordon [this message]
2014-12-08 16:54 ` Damien Lespiau
2014-12-08 16:56 ` Dave Gordon
2014-12-08 17:33 ` [PATCH v3] " Damien Lespiau
2014-12-09 22:14 ` shuang.he
2014-12-10 9:42 ` Jani Nikula
2014-12-10 12:03 ` Damien Lespiau
2014-12-10 13:55 ` Daniel Vetter
2014-12-09 19:14 ` [PATCH v2] " shuang.he
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5485D6C5.8000801@intel.com \
--to=david.s.gordon@intel.com \
--cc=damien.lespiau@intel.com \
--cc=daniel@ffwll.ch \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox