public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Singh, Gaurav K" <gaurav.k.singh@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>,
	Jani Nikula <jani.nikula@linux.intel.com>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/4] drm/i915: DSI sequence related changes for DSI Port C
Date: Wed, 10 Dec 2014 15:05:43 +0530	[thread overview]
Message-ID: <548813EF.1070209@intel.com> (raw)
In-Reply-To: <20141210092043.GC27182@phenom.ffwll.local>


On 12/10/2014 2:50 PM, Daniel Vetter wrote:
> On Tue, Dec 09, 2014 at 12:30:49PM +0200, Jani Nikula wrote:
>> On Tue, 09 Dec 2014, "Singh, Gaurav K" <gaurav.k.singh@intel.com> wrote:
>>> On 12/7/2014 4:13 PM, Gaurav K Singh wrote:
>>>> For DSI Port A & C, the seq_port value has been set to 0 now in VBT
>>>> Now  the sequence of DSI single link on Port A and Port C will based
>>>> on the DVO port from VBT block 2.
>>>>
>>>> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |    9 ++++++++-
>>>>    1 file changed, 8 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>>>> index f8c2269..e7e2e52 100644
>>>> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>>>> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>>>> @@ -110,7 +110,14 @@ static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data)
>>>>    	vc = (byte >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 0x3;
>>>>    	seq_port = (byte >> MIPI_PORT_SHIFT) & 0x3;
>>>>    
>>>> -	port = intel_dsi_seq_port_to_port(seq_port);
>>>> +	/* For DSI Port A & C, the seq_port value has been set to 0 now in VBT
>>>> +	 * Now  the sequence of DSI single link on Port A and Port C will based
>>>> +	 * on the DVO port from VBT block 2.
>>>> +	 */
>>>> +	if (intel_dsi->ports == (1 << PORT_C))
>>>> +		port = PORT_C;
>>>> +	else
>>>> +		port = intel_dsi_seq_port_to_port(seq_port);
>>>>    	/* LP or HS mode */
>>>>    	intel_dsi->hs = mode;
>>>>    
>>> Jani,
>>>
>>> Need your reviewed-by on this patch too.
>> Okay, I was confused because there were actually five patches in this
>> four patch series! ;)
>>
>> The *code* is
>>
>> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>>
>> because I understand it, but frankly both the commit message and the
>> comment confuse me more.
> Hm, do you have suggestions for a better commit message? Should we just
> drop the comment. I agree that the talk about VBT is really confusing and
> smells like leftovers from other stuff.
>
> I'll wait with this one until this is resolved. Accurate and clear commit
> messages are important.
> -Daniel
Jani,

How is the below commit message?

 From now on for both DSI Ports A & C, the seq_port value has been set to 0.
seq_port value is parsed from Sequence block#53 of VBT.So, for packets that needs to be
read/write for DSI single link on Port A and Port C will based on the DVO port from VBT block 2.

With regards,
Gaurav
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2014-12-10  9:35 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-07 10:43 [PATCH 0/4] BYT DSI Enable on Port C Gaurav K Singh
2014-12-07 10:43 ` [PATCH 1/4] drm/i915: Use DSI Pll1 for enabling MIPI DSI " Gaurav K Singh
2014-12-07 11:21   ` [PATCH] " Gaurav K Singh
2014-12-08 11:33     ` Jani Nikula
2014-12-09  5:36       ` Singh, Gaurav K
2014-12-09  0:45     ` shuang.he
2014-12-09  5:27     ` [PATCH 1/4] " Gaurav K Singh
2014-12-09  8:27       ` Jani Nikula
2014-12-07 10:43 ` [PATCH 2/4] drm/i915: DSI sequence related changes for DSI " Gaurav K Singh
2014-12-09  9:51   ` Singh, Gaurav K
2014-12-09 10:30     ` Jani Nikula
2014-12-09 13:49       ` Singh, Gaurav K
2014-12-10  9:20       ` Daniel Vetter
2014-12-10  9:35         ` Singh, Gaurav K [this message]
2014-12-10 16:37         ` [PATCH 2/4] drm/i915: Changes related to the sequence port no for Gaurav K Singh
2014-12-10 17:01           ` Daniel Vetter
2014-12-07 10:43 ` [PATCH 3/4] drm/i915: Enable MIPI PHY transparent latch for DSI Port C Gaurav K Singh
2014-12-09  8:36   ` Jani Nikula
2014-12-07 10:43 ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C Gaurav K Singh
2014-12-08 11:37   ` Jani Nikula
2014-12-08 13:13     ` Singh, Gaurav K
2014-12-08 13:31       ` Jani Nikula
2014-12-09  5:29         ` [PATCH 4/4] drm/i915: Software workaround for getting the HW status of DSI Port C on BYT Gaurav K Singh
2014-12-09  8:34           ` Jani Nikula
2014-12-09  9:49             ` Daniel Vetter
2014-12-09  0:41   ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C shuang.he

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=548813EF.1070209@intel.com \
    --to=gaurav.k.singh@intel.com \
    --cc=daniel@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    --cc=shobhit.kumar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox