Re: [PATCH v6 4/5] drm/i915: Mark shadow batch buffers as purgeable

From: "Michael H. Nguyen" <michael.h.nguyen@intel.com>
To: "Bloomfield, Jon" <jon.bloomfield@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: Brad Volkin <bradley.d.volkin@intel.com>
Subject: Re: [PATCH v6 4/5] drm/i915: Mark shadow batch buffers as purgeable
Date: Thu, 11 Dec 2014 10:56:01 -0800	[thread overview]
Message-ID: <5489E8C1.6000004@intel.com> (raw)
In-Reply-To: <AD48BB7FB99B174FBCC69E228F58B3B61B0FA544@IRSMSX104.ger.corp.intel.com>


On 12/11/2014 05:26 AM, Bloomfield, Jon wrote:
>> -----Original Message-----
>> From: Nguyen, Michael H
>> Sent: Monday, December 08, 2014 10:34 PM
>> To: intel-gfx@lists.freedesktop.org
>> Cc: Bloomfield, Jon; Brad Volkin
>> Subject: [PATCH v6 4/5] drm/i915: Mark shadow batch buffers as purgeable
>>
>> From: Brad Volkin <bradley.d.volkin@intel.com>
>>
>> By adding a new exec_entry flag, we cleanly mark the shadow objects as
>> purgeable after they are on the active list.
>>
>> v2:
>> - Move 'shadow_batch_obj->madv = I915_MADV_WILLNEED' inside _get
>>    fnc (danvet, from v4 6/7 feedback)
>>
>> Issue: VIZ-4719
>> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_gem_batch_pool.c |  2 ++
>> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 ++++++++++-
>>   2 files changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> index e9349e3..9e0ec4b 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_batch_pool.c
>> @@ -128,5 +128,7 @@ i915_gem_batch_pool_get(struct
>> i915_gem_batch_pool *pool,
>>   		list_add_tail(&obj->batch_pool_list, &pool->cache_list);
>>   	}
>>
>> +	obj->madv = I915_MADV_WILLNEED;
>> +
>>   	return obj;
>>   }
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index fccfff5..2071938 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -37,6 +37,7 @@
>>   #define  __EXEC_OBJECT_HAS_FENCE (1<<30)  #define
>> __EXEC_OBJECT_NEEDS_MAP (1<<29)  #define
>> __EXEC_OBJECT_NEEDS_BIAS (1<<28)
>> +#define  __EXEC_OBJECT_PURGEABLE (1<<27)
>>
>>   #define BATCH_OFFSET_BIAS (256*1024)
>>
>> @@ -226,7 +227,12 @@ i915_gem_execbuffer_unreserve_vma(struct
>> i915_vma *vma)
>>   	if (entry->flags & __EXEC_OBJECT_HAS_PIN)
>>   		vma->pin_count--;
>>
>> -	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE |
>> __EXEC_OBJECT_HAS_PIN);
>> +	if (entry->flags & __EXEC_OBJECT_PURGEABLE)
>> +		obj->madv = I915_MADV_DONTNEED;
>> +
>> +	entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE |
>> +			  __EXEC_OBJECT_HAS_PIN |
>> +			  __EXEC_OBJECT_PURGEABLE);
>>   }
>>
>>   static void eb_destroy(struct eb_vmas *eb) @@ -1410,6 +1416,8 @@
>> i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>>   			goto err;
>>   		}
>>
>> +		shadow_batch_obj->madv = I915_MADV_WILLNEED;
>> +
>
> Hasn't i915_gem_batch_pool_get() has already marked the buffer as WILLNEED ?
Yes, good eyes. It was actually corrected in 5/5 but that doesn't make 
this patch okay. Will fix.

Thanks,
Mike
>
>
>>   		ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 4096, 0);
>>   		if (ret)
>>   			goto err;
>> @@ -1433,6 +1441,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>> void *data,
>>
>>   			vma = i915_gem_obj_to_ggtt(shadow_batch_obj);
>>   			vma->exec_entry = &shadow_exec_entry;
>> +			vma->exec_entry->flags =
>> __EXEC_OBJECT_PURGEABLE;
>>   			drm_gem_object_reference(&shadow_batch_obj-
>>> base);
>>   			list_add_tail(&vma->exec_list, &eb->vmas);
>>
>> --
>> 1.9.1
>
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