From: John Harrison <John.C.Harrison@Intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/5] drm/i915: Cache last obj->pages location for i915_gem_object_get_page()
Date: Fri, 13 Feb 2015 13:35:26 +0000 [thread overview]
Message-ID: <54DDFD9E.8070100@Intel.com> (raw)
In-Reply-To: <1421234459-21424-4-git-send-email-chris@chris-wilson.co.uk>
Accidentally hit send too early, ignore the other reply!
On 14/01/2015 11:20, Chris Wilson wrote:
> The biggest user of i915_gem_object_get_page() is the relocation
> processing during execbuffer. Typically userspace passes in a set of
> relocations in sorted order. Sadly, we alternate between relocations
> increasing from the start of the buffers, and relocations decreasing
> from the end. However the majority of consecutive lookups will still be
> in the same page. We could cache the start of the last sg chain, however
> for most callers, the entire sgl is inside a single chain and so we see
> no improve from the extra layer of caching.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=88308
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 31 ++++++++++++++++++++++++++-----
> drivers/gpu/drm/i915/i915_gem.c | 4 ++++
> 2 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 66f0c607dbef..04a7d594d933 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2005,6 +2005,10 @@ struct drm_i915_gem_object {
>
> struct sg_table *pages;
> int pages_pin_count;
> + struct get_page {
> + struct scatterlist *sg;
> + int last;
> + } get_page;
>
> /* prime dma-buf support */
> void *dma_buf_vmapping;
> @@ -2612,15 +2616,32 @@ int i915_gem_obj_prepare_shmem_read(struct drm_i915_gem_object *obj,
> int *needs_clflush);
>
> int __must_check i915_gem_object_get_pages(struct drm_i915_gem_object *obj);
> -static inline struct page *i915_gem_object_get_page(struct drm_i915_gem_object *obj, int n)
> +
> +static inline int sg_page_count(struct scatterlist *sg)
> +{
> + return PAGE_ALIGN(sg->offset + sg->length) >> PAGE_SHIFT;
Does this need to be rounded up or are sg->offset and sg->length
guaranteed to always be a multiple of the page size?
> +}
> +
> +static inline struct page *
> +i915_gem_object_get_page(struct drm_i915_gem_object *obj, int n)
> {
> - struct sg_page_iter sg_iter;
> + if (WARN_ON(n >= obj->base.size >> PAGE_SHIFT))
> + return NULL;
>
> - for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, n)
> - return sg_page_iter_page(&sg_iter);
> + if (n < obj->get_page.last) {
> + obj->get_page.sg = obj->pages->sgl;
> + obj->get_page.last = 0;
> + }
> +
> + while (obj->get_page.last + sg_page_count(obj->get_page.sg) <= n) {
> + obj->get_page.last += sg_page_count(obj->get_page.sg);
> + if (unlikely(sg_is_chain(++obj->get_page.sg)))
Is it safe to do the ++ inside a nested pair of macros? There is at
least one definition of 'unlikely' in the linux source that would cause
multiple evaluations.
> + obj->get_page.sg = sg_chain_ptr(obj->get_page.sg);
> + }
>
> - return NULL;
> + return nth_page(sg_page(obj->get_page.sg), n - obj->get_page.last);
> }
> +
> static inline void i915_gem_object_pin_pages(struct drm_i915_gem_object *obj)
> {
> BUG_ON(obj->pages == NULL);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 6c403654e33a..d710da099bdb 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2260,6 +2260,10 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
> return ret;
>
> list_add_tail(&obj->global_list, &dev_priv->mm.unbound_list);
> +
> + obj->get_page.sg = obj->pages->sgl;
> + obj->get_page.last = 0;
> +
> return 0;
> }
>
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next prev parent reply other threads:[~2015-02-13 13:35 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-14 11:20 [PATCH 1/5] agp/intel: Serialise after GTT updates Chris Wilson
2015-01-14 11:20 ` [PATCH 2/5] drm/i915: Fallback to using CPU relocations for large batch buffers Chris Wilson
2015-01-15 9:45 ` Daniel, Thomas
2015-01-26 8:57 ` Jani Nikula
2015-01-27 15:09 ` Daniel Vetter
2015-01-27 21:43 ` Chris Wilson
2015-01-28 9:14 ` Daniel Vetter
2015-01-28 9:34 ` Chris Wilson
2015-01-14 11:20 ` [PATCH 3/5] drm/i915: Trim the command parser allocations Chris Wilson
2015-02-13 13:08 ` John Harrison
2015-02-13 13:23 ` Chris Wilson
2015-02-13 16:43 ` John Harrison
2015-02-23 16:09 ` Daniel Vetter
2015-01-14 11:20 ` [PATCH 4/5] drm/i915: Cache last obj->pages location for i915_gem_object_get_page() Chris Wilson
2015-02-13 13:33 ` John Harrison
2015-02-13 13:35 ` John Harrison [this message]
2015-02-13 14:28 ` Chris Wilson
2015-01-14 11:20 ` [PATCH 5/5] drm/i915: Tidy batch pool logic Chris Wilson
2015-01-14 20:54 ` shuang.he
2015-02-13 14:00 ` John Harrison
2015-02-13 14:57 ` Chris Wilson
2015-01-26 10:47 ` [PATCH v2] agp/intel: Serialise after GTT updates Chris Wilson
2015-01-27 14:58 ` Daniel Vetter
2015-01-27 21:44 ` Chris Wilson
2015-01-28 9:15 ` Daniel Vetter
2015-01-28 7:50 ` shuang.he
2015-02-06 0:11 ` [PATCH 1/5] " Jesse Barnes
2015-02-06 8:31 ` Chris Wilson
2015-02-06 8:32 ` Daniel Vetter
2015-02-13 8:59 ` Ville Syrjälä
2015-02-13 9:25 ` Chris Wilson
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