From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: imre.deak@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 39/49] drm/i915/chv: use vlv_PLL_is_optimal in chv_find_best_dpll
Date: Thu, 19 Mar 2015 13:56:35 -0700 [thread overview]
Message-ID: <550B3803.40807@virtuousgeek.org> (raw)
In-Reply-To: <1426798503.32462.34.camel@ideak-mobl>
On 03/19/2015 01:55 PM, Imre Deak wrote:
> On Thu, 2015-03-19 at 13:34 -0700, Jesse Barnes wrote:
>> On 03/17/2015 02:40 AM, Imre Deak wrote:
>>> Prepare chv_find_best_dpll to be used for BXT too, where we want to
>>> consider the error between target and calculated frequency too when
>>> choosing a better PLL configuration.
>>>
>>> No functional change.
>>>
>>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++++++------
>>> 1 file changed, 20 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>> index 5874512..9ca84a2 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -786,6 +786,16 @@ static bool vlv_PLL_is_optimal(struct drm_device *dev, int target_freq,
>>> unsigned int best_error_ppm,
>>> unsigned int *error_ppm)
>>> {
>>> + /*
>>> + * For CHV ignore the error and consider only the P value.
>>> + * Prefer a bigger P value based on HW requirements.
>>> + */
>>> + if (IS_CHERRYVIEW(dev)) {
>>> + *error_ppm = 0;
>>> +
>>> + return calculated_clock->p > best_clock->p;
>>> + }
>>> +
>>> if (WARN_ON_ONCE(!target_freq))
>>> return false;
>>>
>>> @@ -864,11 +874,13 @@ chv_find_best_dpll(const intel_limit_t *limit, struct intel_crtc *crtc,
>>> intel_clock_t *best_clock)
>>> {
>>> struct drm_device *dev = crtc->base.dev;
>>> + unsigned int best_error_ppm;
>>> intel_clock_t clock;
>>> uint64_t m2;
>>> int found = false;
>>>
>>> memset(best_clock, 0, sizeof(*best_clock));
>>> + best_error_ppm = 1000000;
>>>
>>> /*
>>> * Based on hardware doc, the n always set to 1, and m1 always
>>> @@ -882,6 +894,7 @@ chv_find_best_dpll(const intel_limit_t *limit, struct intel_crtc *crtc,
>>> for (clock.p2 = limit->p2.p2_fast;
>>> clock.p2 >= limit->p2.p2_slow;
>>> clock.p2 -= clock.p2 > 10 ? 2 : 1) {
>>> + unsigned int error_ppm;
>>>
>>> clock.p = clock.p1 * clock.p2;
>>>
>>> @@ -898,12 +911,13 @@ chv_find_best_dpll(const intel_limit_t *limit, struct intel_crtc *crtc,
>>> if (!intel_PLL_is_valid(dev, limit, &clock))
>>> continue;
>>>
>>> - /* based on hardware requirement, prefer bigger p
>>> - */
>>> - if (clock.p > best_clock->p) {
>>> - *best_clock = clock;
>>> - found = true;
>>> - }
>>> + if (!vlv_PLL_is_optimal(dev, target, &clock, best_clock,
>>> + best_error_ppm, &error_ppm))
>>> + continue;
>>> +
>>> + *best_clock = clock;
>>> + best_error_ppm = error_ppm;
>>> + found = true;
>>> }
>>> }
>>>
>>>
>>
>> Looking at it again, maybe vlv_PLL_is_better() might be a better name.
>
> Ok, will change it.
>
>> Also, could you just make the ppm variable a scratch one and ignore it?
>> It just gets set to 0 no matter what, right?
>
> For CHV yes. But the next patch takes the same function into use in BXT
> too, where error_ppm will be set to the actual error, the same way as on
> VLV.
Oh right it's a patch *series*. Ignore the noise. :)
The rename is optional too; I just had to think about it when I saw
>>> + return calculated_clock->p > best_clock->p;
since in that case we're really checking whether the new calculated p
value is better (higher) than the last one. The _is_optimal() name made
me think it should be >= or something. But it's not a big deal.
Thanks,
Jesse
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next prev parent reply other threads:[~2015-03-19 20:57 UTC|newest]
Thread overview: 191+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-17 9:39 [PATCH 00/49] Basic Broxton enabling Imre Deak
2015-03-17 9:39 ` [PATCH 01/49] drm/i915/bxt: Add BXT PCI ids Imre Deak
2015-03-23 9:56 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 02/49] drm/i915/bxt: BXT FBC enablement Imre Deak
2015-03-17 17:49 ` Rodrigo Vivi
2015-03-25 20:46 ` Imre Deak
2015-03-26 15:35 ` [PATCH 02.1/49] drm/i915: use proper FBC base register on all new platforms Imre Deak
2015-03-30 10:05 ` Antti Koskipää
2015-03-30 10:04 ` [PATCH 02/49] drm/i915/bxt: BXT FBC enablement Antti Koskipää
2015-03-30 10:04 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 03/49] drm/i915/bxt: Add IS_BROXTON macro Imre Deak
2015-03-23 9:49 ` Sivakumar Thulasimani
2015-03-17 9:39 ` [PATCH 04/49] drm/i915/bxt: Broxton uses the same GMS values as Skylake Imre Deak
2015-03-23 10:23 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 05/49] drm/i915/bxt: Enable PTE encoding Imre Deak
2015-03-23 10:23 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 06/49] drm/i915/bxt: Broxton has 3 sprite planes on pipe A/B, 2 on pipe C Imre Deak
2015-03-23 10:29 ` Antti Koskipää
2015-03-31 11:18 ` Daniel Vetter
2015-03-17 9:39 ` [PATCH 07/49] drm/i915/bxt: Add the plane4 related interrupt definitions Imre Deak
2015-03-23 10:28 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 08/49] drm/i915/bxt: Broxton DDB is 512 blocks Imre Deak
2015-03-23 10:24 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 09/49] drm/i915/bxt: Broxton raises the maximum number of planes to 4 Imre Deak
2015-03-23 10:24 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 10/49] drm/i915/bxt: map GTT as uncached Imre Deak
2015-03-17 10:33 ` Daniel Vetter
2015-03-17 12:31 ` Imre Deak
2015-03-17 13:47 ` Daniel Vetter
2015-03-27 11:07 ` [PATCH v2] " Imre Deak
2015-03-30 10:02 ` Antti Koskipää
2015-03-17 9:39 ` [PATCH 11/49] drm/i915/gen9: fix PIPE_CONTROL flush for VS_INVALIDATE Imre Deak
2015-03-17 10:35 ` Daniel Vetter
2015-04-08 12:56 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 12/49] drm/i915/bxt: HardWare WorkAround ring initialisation for Broxton Imre Deak
2015-03-19 16:47 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 13/49] drm/i915/bxt: add bxt_init_clock_gating Imre Deak
2015-03-19 16:50 ` Nick Hoath
2015-03-20 10:17 ` Imre Deak
2015-03-27 12:00 ` [PATCH v2 " Imre Deak
2015-04-08 9:35 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 14/49] drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround Imre Deak
2015-03-17 10:35 ` Daniel Vetter
2015-03-17 13:06 ` Imre Deak
2015-03-20 9:08 ` Nick Hoath
2015-03-20 10:37 ` Imre Deak
2015-03-25 14:53 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 15/49] drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround Imre Deak
2015-04-08 13:04 ` Nick Hoath
2015-04-08 13:10 ` Imre Deak
2015-04-08 13:38 ` Nick Hoath
2015-04-08 13:45 ` Imre Deak
2015-04-08 14:13 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 16/49] drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround Imre Deak
2015-03-20 9:05 ` Nick Hoath
2015-03-20 10:25 ` Imre Deak
2015-03-25 14:52 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 17/49] drm/i915/skl: " Imre Deak
2015-03-20 9:07 ` Nick Hoath
2015-03-20 10:33 ` Imre Deak
2015-04-08 13:40 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 18/49] drm/i915/bxt: add workaround to avoid PTE corruption Imre Deak
2015-03-17 10:36 ` Daniel Vetter
2015-03-17 13:30 ` Imre Deak
2015-04-08 13:11 ` Nick Hoath
2015-03-17 9:39 ` [PATCH 19/49] drm/i915/bxt: don't use unsupported port detection Imre Deak
2015-03-25 16:07 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 20/49] drm/i915/bxt: Add change to support gmbus pin pair for BXT Imre Deak
2015-03-25 16:45 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 21/49] drm/i915/bxt: WARN in case BXT unused gmbus ports are accessed Imre Deak
2015-03-25 16:49 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 22/49] drm/i915/bxt: Avoid registering unused gmbus ports as i2c adapter Imre Deak
2015-03-26 17:14 ` Jani Nikula
2015-03-26 22:24 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 23/49] drm/i915/bxt: Increase DDI buf idle timeout Imre Deak
2015-03-17 10:39 ` Daniel Vetter
2015-03-27 12:19 ` [PATCH v2 " Imre Deak
2015-04-08 9:20 ` Jani Nikula
2015-04-08 12:00 ` Daniel Vetter
2015-03-17 9:39 ` [PATCH 24/49] drm/i915/bxt: DDI Hotplug interrupt setup Imre Deak
2015-03-17 10:48 ` Daniel Vetter
2015-03-17 15:39 ` Imre Deak
2015-03-27 12:54 ` [PATCH v6 " Imre Deak
2015-04-08 10:32 ` Jani Nikula
2015-04-10 12:08 ` [PATCH v7 " Imre Deak
2015-04-13 13:41 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 25/49] drm/i915/bxt: Add DDI hpd handler Imre Deak
2015-03-17 10:52 ` Daniel Vetter
2015-03-17 16:03 ` Imre Deak
2015-03-27 15:22 ` [PATCH 25.1/49] drm/i915/bxt: support for HPD long/short status decoding Imre Deak
2015-04-08 10:58 ` Jani Nikula
2015-04-08 11:18 ` Imre Deak
2015-04-08 11:22 ` Jani Nikula
2015-04-08 10:55 ` [PATCH 25/49] drm/i915/bxt: Add DDI hpd handler Jani Nikula
2015-04-10 12:08 ` [PATCH v2 " Imre Deak
2015-04-13 13:45 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 26/49] drm/i915/bxt: Add BXT support in gen8_irq functions Imre Deak
2015-04-08 11:06 ` Jani Nikula
2015-04-10 12:08 ` [PATCH v2 " Imre Deak
2015-04-13 13:51 ` Jani Nikula
2015-04-13 13:58 ` Imre Deak
2015-04-13 14:48 ` [PATCH v3 " Imre Deak
2015-04-14 7:23 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 27/49] drm/i915/bxt: Enable GMBUS IRQ Imre Deak
2015-04-08 11:11 ` Jani Nikula
2015-04-10 12:08 ` [PATCH v4 " Imre Deak
2015-04-13 13:52 ` Jani Nikula
2015-03-17 9:39 ` [PATCH 28/49] drm/i915/bxt: Define BXT power domains Imre Deak
2015-03-19 17:08 ` Ville Syrjälä
2015-03-17 9:39 ` [PATCH 29/49] drm/i915: Rename vlv_cdclk_freq to cdclk_freq Imre Deak
2015-03-17 10:54 ` Daniel Vetter
2015-03-17 13:20 ` Ville Syrjälä
2015-04-15 19:19 ` Ville Syrjälä
2015-03-17 9:39 ` [PATCH 30/49] drm/i915/bxt: add display initialize/uninitialize sequence Imre Deak
2015-03-19 19:55 ` Ville Syrjälä
2015-03-20 14:10 ` Ville Syrjälä
2015-03-20 17:15 ` Imre Deak
2015-04-02 16:32 ` Ville Syrjälä
2015-04-07 14:07 ` Imre Deak
2015-04-15 13:42 ` [PATCH v4 30/49] drm/i915/bxt: add display initialize/uninitialize sequence (CDCLK) Imre Deak
2015-04-15 14:14 ` Ville Syrjälä
2015-04-15 13:42 ` [PATCH 30.1/49] drm/i915/bxt: add display initialize/uninitialize sequence (PHY) Imre Deak
2015-04-15 14:31 ` Ville Syrjälä
2015-03-17 9:39 ` [PATCH 31/49] drm/i915/bxt: add description about the BXT PHYs Imre Deak
2015-03-19 17:30 ` Ville Syrjälä
2015-04-15 13:42 ` [PATCH v2 " Imre Deak
2015-04-15 13:54 ` Ville Syrjälä
2015-03-17 9:39 ` [PATCH 32/49] drm/i915/bxt: Implement enable/disable for Display C9 state Imre Deak
2015-04-12 10:32 ` sagar.a.kamble
2015-04-13 10:09 ` Imre Deak
2015-04-13 10:25 ` Sagar Arun Kamble
2015-04-16 7:19 ` Daniel Vetter
2015-03-17 9:39 ` [PATCH 33/49] drm/i915/bxt: Add DC9 Trigger sequence Imre Deak
2015-03-30 12:19 ` sagar.a.kamble
2015-04-15 14:13 ` [PATCH v4 " Imre Deak
2015-03-17 9:40 ` [PATCH 34/49] drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9 Imre Deak
2015-04-15 14:15 ` [PATCH v3 " Imre Deak
2015-04-15 18:55 ` Sagar Arun Kamble
2015-03-17 9:40 ` [PATCH 35/49] drm/i915/bxt: fix panel fitter setup in crtc disable/enable Imre Deak
2015-03-17 13:51 ` Daniel Vetter
2015-03-17 14:22 ` Imre Deak
2015-03-18 8:37 ` Daniel Vetter
2015-03-18 10:31 ` Imre Deak
2015-04-12 10:14 ` sagar.a.kamble
2015-04-12 10:19 ` sagar.a.kamble
2015-04-13 9:21 ` Daniel Vetter
2015-04-12 10:22 ` [PATCH 34/49] drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9 sagar.a.kamble
2015-04-13 13:21 ` Damien Lespiau
2015-04-13 13:30 ` Imre Deak
2015-04-15 14:18 ` [PATCH v2 35/49] drm/i915/bxt: fix panel fitter setup in crtc disable/enable Imre Deak
2015-03-17 9:40 ` [PATCH 36/49] drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable sequence Imre Deak
2015-03-19 20:27 ` Jesse Barnes
2015-03-19 20:33 ` Imre Deak
2015-03-17 9:40 ` [PATCH 37/49] drm/i915: factor out vlv_PLL_is_optimal Imre Deak
2015-03-19 20:31 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 38/49] drm/i915: check for div-by-zero in vlv_PLL_is_optimal Imre Deak
2015-03-19 20:31 ` Jesse Barnes
2015-03-20 10:00 ` Daniel Vetter
2015-03-17 9:40 ` [PATCH 39/49] drm/i915/chv: use vlv_PLL_is_optimal in chv_find_best_dpll Imre Deak
2015-03-19 20:34 ` Jesse Barnes
2015-03-19 20:55 ` Imre Deak
2015-03-19 20:56 ` Jesse Barnes [this message]
2015-03-20 10:02 ` Daniel Vetter
2015-03-17 9:40 ` [PATCH 40/49] drm/i915/bxt: add bxt_find_best_dpll Imre Deak
2015-03-19 20:39 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 41/49] drm/i915/bxt: BXT clock divider calculation Imre Deak
2015-03-19 20:46 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 42/49] drm/i915/bxt: Assign PLL for pipe Imre Deak
2015-03-19 20:48 ` Jesse Barnes
2015-04-16 9:32 ` Daniel Vetter
2015-03-17 9:40 ` [PATCH 43/49] drm/i915/bxt: Determine PLL attached to pipe Imre Deak
2015-03-19 20:48 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 44/49] drm/i915/bxt: Determine programmed frequency Imre Deak
2015-03-19 20:51 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 45/49] drm/i915: suppress false PLL state warnings on non-GMCH platforms Imre Deak
2015-03-19 20:53 ` Jesse Barnes
2015-03-19 20:57 ` Imre Deak
2015-03-19 21:19 ` Jesse Barnes
2015-03-17 9:40 ` [PATCH 46/49] drm/i915: Iterate through the initialized DDIs to prepare their buffers Imre Deak
2015-03-23 10:51 ` Sivakumar Thulasimani
2015-03-25 15:04 ` Damien Lespiau
2015-04-24 12:47 ` Ander Conselvan De Oliveira
2015-04-24 15:22 ` Imre Deak
2015-03-17 9:40 ` [PATCH 47/49] drm/i915: Don't write the HDMI buffer translation entry when not needed Imre Deak
2015-03-23 10:57 ` Sivakumar Thulasimani
2015-03-17 9:40 ` [PATCH 48/49] drm/i915/bxt: VSwing programming sequence Imre Deak
2015-03-24 9:19 ` Sivakumar Thulasimani
2015-04-09 17:14 ` Imre Deak
2015-03-17 9:40 ` [PATCH 49/49] drm/i915/bxt: Update max level of vswing Imre Deak
2015-03-17 18:22 ` shuang.he
2015-03-24 10:26 ` Sivakumar Thulasimani
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