From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sivakumar Thulasimani Subject: Re: [PATCH 49/49] drm/i915/bxt: Update max level of vswing Date: Tue, 24 Mar 2015 15:56:55 +0530 Message-ID: <55113BEF.4020008@intel.com> References: <1426585215-8788-1-git-send-email-imre.deak@intel.com> <1426585215-8788-50-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1475441760==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 023F16E177 for ; Tue, 24 Mar 2015 03:26:56 -0700 (PDT) In-Reply-To: <1426585215-8788-50-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org This is a multi-part message in MIME format. --===============1475441760== Content-Type: multipart/alternative; boundary="------------060401040803020100000203" This is a multi-part message in MIME format. --------------060401040803020100000203 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Reviewed-by: Sivakumar Thulasimani On 3/17/2015 3:10 PM, Imre Deak wrote: > From: Vandana Kannan > > Broxton supports 3 voltage swing levels on all DP ports. > Max level of pre-emphasis will be taken care with the existing code. > > v2: Patch rebased > > v3: (imre) > - keep existing behavior for other platforms > - clarify commit message > > Signed-off-by: Vandana Kannan (v2) > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_dp.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 1cb6eb0..019c224 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2832,7 +2832,9 @@ intel_dp_voltage_max(struct intel_dp *intel_dp) > struct drm_i915_private *dev_priv = dev->dev_private; > enum port port = dp_to_dig_port(intel_dp)->port; > > - if (INTEL_INFO(dev)->gen >= 9) { > + if (IS_BROXTON(dev)) > + return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; > + else if (INTEL_INFO(dev)->gen >= 9) { > if (dev_priv->vbt.edp_low_vswing && port == PORT_A) > return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; > return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; --------------060401040803020100000203 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 7bit

Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>

On 3/17/2015 3:10 PM, Imre Deak wrote:

From: Vandana Kannan <vandana.kannan@intel.com>

Broxton supports 3 voltage swing levels on all DP ports.
Max level of pre-emphasis will be taken care with the existing code.

v2: Patch rebased

v3: (imre)
- keep existing behavior for other platforms
- clarify commit message

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1cb6eb0..019c224 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2832,7 +2832,9 @@ intel_dp_voltage_max(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	enum port port = dp_to_dig_port(intel_dp)->port;
 
-	if (INTEL_INFO(dev)->gen >= 9) {
+	if (IS_BROXTON(dev))
+		return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
+	else if (INTEL_INFO(dev)->gen >= 9) {
 		if (dev_priv->vbt.edp_low_vswing && port == PORT_A)
 			return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
 		return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;

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