From: Michel Thierry <michel.thierry@intel.com>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: Add fault address to error state for gen8 and gen9
Date: Tue, 24 Mar 2015 13:01:54 +0000 [thread overview]
Message-ID: <55116042.1020603@intel.com> (raw)
In-Reply-To: <1427201659-22850-1-git-send-email-mika.kuoppala@intel.com>
On 3/24/2015 12:54 PM, Mika Kuoppala wrote:
> The faulting virtual address is >32bits and has been moved
> to different registers. Add to error state and output upper
> register first, in the same line for easy reconstruction of
> the fault address.
>
> v2: correct gen masking (Michel)
> v3: s/TBL/TLB (Ville)
>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_gpu_error.c | 10 ++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 3 files changed, 15 insertions(+)
>
Thanks for noticing that last typo...
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
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next prev parent reply other threads:[~2015-03-24 13:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-24 12:06 [PATCH] drm/i915: Add fault address to error state for gen8 and gen9 Mika Kuoppala
2015-03-24 12:10 ` Ville Syrjälä
2015-03-24 12:54 ` Mika Kuoppala
2015-03-24 13:01 ` Michel Thierry [this message]
2015-03-25 13:35 ` Daniel Vetter
2015-03-25 13:11 ` shuang.he
2015-03-25 10:52 ` shuang.he
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