Re: [PATCH v3 08/15] drm/i915: Functions to support command submission via GuC

From: Yu Dai <yu.dai@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 08/15] drm/i915: Functions to support command submission via GuC
Date: Mon, 20 Apr 2015 09:07:28 -0700	[thread overview]
Message-ID: <55352440.8050302@intel.com> (raw)
In-Reply-To: <20150418134845.GB10530@nuc-i3427.alporthouse.com>


On 04/18/2015 06:48 AM, Chris Wilson wrote:
> On Fri, Apr 17, 2015 at 02:21:13PM -0700, yu.dai@intel.com wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index de8c074..8f13e80 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1993,7 +1993,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
> >  	INIT_LIST_HEAD(&ring->request_list);
> >  	INIT_LIST_HEAD(&ring->execlist_queue);
> >  	i915_gem_batch_pool_init(dev, &ring->batch_pool);
> > -	ringbuf->size = 32 * PAGE_SIZE;
> > +	ringbuf->size = 4 * PAGE_SIZE;
> >  	ringbuf->ring = ring;
> >  	memset(ring->semaphore.sync_seqno, 0, sizeof(ring->semaphore.sync_seqno));
>
> NAK.
>
First of all, GuC firmware reserves limited bits for ring buffer. 4 
pages is max for now. Second, considering the ring buffer is per-context 
now, there is no need to allocate 32 pages for it.

Thanks,
Alex
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