From: "Kannan, Vandana" <vandana.kannan@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>, imre.deak@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/i915: eDP Panel Power sequencing add PPS reg set
Date: Mon, 04 May 2015 11:54:07 +0530 [thread overview]
Message-ID: <55471087.30502@intel.com> (raw)
In-Reply-To: <87r3r197wv.fsf@intel.com>
On 4/30/2015 4:53 PM, Jani Nikula wrote:
> On Thu, 30 Apr 2015, Imre Deak <imre.deak@intel.com> wrote:
>> On to, 2015-04-30 at 13:07 +0530, Vandana Kannan wrote:
>>> Second set of PPS registers have been defined but will be used when VBT
>>> provides a selection between the 2 sets of registers.
>>>
>>> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
>>> Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
>>> 1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>>> index 580f5cb..199a1747 100644
>>> --- a/drivers/gpu/drm/i915/i915_reg.h
>>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>>> @@ -6345,6 +6345,12 @@ enum skl_disp_power_wells {
>>> #define PANEL_POWER_CYCLE_DELAY_MASK (0x1f)
>>> #define PANEL_POWER_CYCLE_DELAY_SHIFT 0
>>>
>>> +/* BXT PPS changes - 2nd set of PPS registers */
>>> +#define BXT_PP_STATUS2 0xc7300
>>> +#define BXT_PP_CONTROL2 0xc7304
>>> +#define BXT_PP_ON_DELAYS2 0xc7308
>>> +#define BXT_PP_OFF_DELAYS2 0xc730c
>>> +
>>
>> Can we add these in the (future) patch which takes them into use?
>
> See my review comment, we should use them off the bat.
>
> BR,
> Jani.
>
Agree with all your review comments.
I've made the changes and will be resending the patch today.
- Vandana
>>
>>> #define PCH_DP_B 0xe4100
>>> #define PCH_DPB_AUX_CH_CTL 0xe4110
>>> #define PCH_DPB_AUX_CH_DATA1 0xe4114
>>
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
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next prev parent reply other threads:[~2015-05-04 6:24 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 7:37 [PATCH 1/3] drm/i915: eDP Panel Power sequencing modify use of HAS_PCH_SPLIT Vandana Kannan
2015-04-30 7:37 ` [PATCH 2/3] drm/i915: eDP Panel Power sequencing PP_DIV register changes Vandana Kannan
2015-04-30 8:57 ` Jani Nikula
2015-04-30 9:27 ` David Weinehall
2015-04-30 7:37 ` [PATCH 3/3] drm/i915: eDP Panel Power sequencing add PPS reg set Vandana Kannan
2015-04-30 8:43 ` Jani Nikula
2015-04-30 11:15 ` Imre Deak
2015-04-30 11:23 ` Jani Nikula
2015-05-04 6:24 ` Kannan, Vandana [this message]
2015-05-04 7:06 ` [PATCH] drm/i915: eDP Panel Power sequencing Vandana Kannan
2015-05-04 11:12 ` shuang.he
2015-05-06 15:05 ` Jani Nikula
2015-05-07 4:13 ` Kannan, Vandana
2015-05-07 7:31 ` [PATCH v3] drm/i915/bxt: " Vandana Kannan
2015-05-07 7:37 ` Jani Nikula
2015-05-11 14:34 ` Kannan, Vandana
2015-05-13 9:43 ` [PATCH v4] " Vandana Kannan
2015-05-13 9:22 ` Kannan, Vandana
2015-06-03 12:01 ` Kannan, Vandana
2015-05-14 9:13 ` shuang.he
2015-05-08 5:47 ` [PATCH v3] " shuang.he
2015-05-01 13:30 ` [PATCH 3/3] drm/i915: eDP Panel Power sequencing add PPS reg set shuang.he
2015-04-30 8:50 ` [PATCH 1/3] drm/i915: eDP Panel Power sequencing modify use of HAS_PCH_SPLIT Jani Nikula
2015-05-06 10:08 ` Daniel Vetter
2015-05-06 10:12 ` Jani Nikula
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