From: Deepak S <deepak.s@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/7] Revert "drm/i915: Hack to tie both common lanes together on chv"
Date: Fri, 08 May 2015 18:25:53 +0530 [thread overview]
Message-ID: <554CB259.5090100@linux.intel.com> (raw)
In-Reply-To: <1428679293-6208-4-git-send-email-ville.syrjala@linux.intel.com>
On Friday 10 April 2015 08:51 PM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> With recent hardware/firmware there don't appear to be any glitches
> on the other PHY when we toggle the cmnreset for the other PHY. So
> detangle the cmnlane power wells from one another and let them be
> controlled independently.
>
> This reverts commit 3dd7b97458e8aa2d8985b46622d226fa635071e7.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index b73671f..1f800f8 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1181,23 +1181,13 @@ static struct i915_power_well chv_power_wells[] = {
> #endif
> {
> .name = "dpio-common-bc",
> - /*
> - * XXX: cmnreset for one PHY seems to disturb the other.
> - * As a workaround keep both powered on at the same
> - * time for now.
> - */
> - .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS | CHV_DPIO_CMN_D_POWER_DOMAINS,
> + .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS,
> .data = PUNIT_POWER_WELL_DPIO_CMN_BC,
> .ops = &chv_dpio_cmn_power_well_ops,
> },
> {
> .name = "dpio-common-d",
> - /*
> - * XXX: cmnreset for one PHY seems to disturb the other.
> - * As a workaround keep both powered on at the same
> - * time for now.
> - */
> - .domains = CHV_DPIO_CMN_BC_POWER_DOMAINS | CHV_DPIO_CMN_D_POWER_DOMAINS,
> + .domains = CHV_DPIO_CMN_D_POWER_DOMAINS,
> .data = PUNIT_POWER_WELL_DPIO_CMN_D,
> .ops = &chv_dpio_cmn_power_well_ops,
> },
Right, Issue is fixed with latest FW.
Reviewed-by: Deepak S<deepak.s@linux.intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-05-08 12:59 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-10 15:21 [PATCH 0/7] drm/i915: CHV DPIO power gating stuff ville.syrjala
2015-04-10 15:21 ` [PATCH 1/7] drm/i915: Implement chv display PHY lane stagger setup ville.syrjala
2015-05-08 12:26 ` Deepak S
2015-04-10 15:21 ` [PATCH 2/7] drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV ville.syrjala
2015-05-08 12:54 ` Deepak S
2015-05-08 13:19 ` Ville Syrjälä
2015-05-08 13:33 ` Deepak S
2015-05-08 13:57 ` Daniel Vetter
2015-04-10 15:21 ` [PATCH 3/7] Revert "drm/i915: Hack to tie both common lanes together on chv" ville.syrjala
2015-05-08 12:55 ` Deepak S [this message]
2015-04-10 15:21 ` [PATCH 4/7] drm/i915: Use the default 600ns LDO programming sequence delay ville.syrjala
2015-05-08 13:01 ` Deepak S
2015-05-08 13:22 ` Ville Syrjälä
2015-05-08 13:35 ` Deepak S
2015-04-10 15:21 ` [PATCH 5/7] drm/i915: Only wait for required lanes in vlv_wait_port_ready() ville.syrjala
2015-05-08 13:53 ` Deepak S
2015-05-08 14:27 ` Daniel Vetter
2015-04-10 15:21 ` [PATCH 6/7] drm/i915: Implement PHY lane power gating for CHV ville.syrjala
2015-05-08 14:49 ` Deepak S
2015-05-08 16:05 ` Ville Syrjälä
2015-05-09 5:35 ` Deepak S
2015-05-11 11:43 ` Ville Syrjälä
2015-05-13 3:19 ` Deepak S
2015-04-10 15:21 ` [PATCH 7/7] drm/i915: Throw out WIP CHV power well definitions ville.syrjala
2015-04-10 23:09 ` shuang.he
2015-05-08 14:58 ` Deepak S
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=554CB259.5090100@linux.intel.com \
--to=deepak.s@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox