From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/12] drm/i915: Fix DP enhanced framing for CPT
Date: Thu, 21 May 2015 12:19:23 -0700 [thread overview]
Message-ID: <555E2FBB.8060504@virtuousgeek.org> (raw)
In-Reply-To: <1430835458-11187-6-git-send-email-ville.syrjala@linux.intel.com>
On 05/05/2015 07:17 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we're always enabling enhanced framing on CPT even if the sink
> doesn't support it. Fix this up by actaully looking at what the sink
> tells us.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +--
> drivers/gpu/drm/i915/intel_dp.c | 9 +++++++++
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a392188..a177f2e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4206,8 +4206,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
> temp &= ~(TRANS_DP_PORT_SEL_MASK |
> TRANS_DP_SYNC_MASK |
> TRANS_DP_BPC_MASK);
> - temp |= (TRANS_DP_OUTPUT_ENABLE |
> - TRANS_DP_ENH_FRAMING);
> + temp |= TRANS_DP_OUTPUT_ENABLE;
> temp |= bpc << 9; /* same format but at 11:9 */
>
> if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC)
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index dc89931..17b006c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1573,7 +1573,16 @@ static void intel_dp_prepare(struct intel_encoder *encoder)
>
> intel_dp->DP |= crtc->pipe << 29;
> } else if (HAS_PCH_CPT(dev) && port != PORT_A) {
> + u32 trans_dp;
> +
> intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
> +
> + trans_dp = I915_READ(TRANS_DP_CTL(crtc->pipe));
> + if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
> + trans_dp |= TRANS_DP_ENH_FRAMING;
> + else
> + trans_dp &= ~TRANS_DP_ENH_FRAMING;
> + I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp);
> } else {
> if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev))
> intel_dp->DP |= intel_dp->color_range;
>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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next prev parent reply other threads:[~2015-05-21 19:19 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-05 14:17 [PATCH 00/12] drm/i915: PCH modeset sequence fixes ville.syrjala
2015-05-05 14:17 ` [PATCH 01/12] drm/i915: Remove a bogus 12bpc "toggle" from intel_disable_hdmi() ville.syrjala
2015-05-21 19:04 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 02/12] drm/i915: Remove the double register write " ville.syrjala
2015-05-21 19:04 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 03/12] drm/i915: Clarfify the DP code platform checks ville.syrjala
2015-05-21 19:10 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 04/12] drm/i915: Clean up the CPT DP .get_hw_state() port readout ville.syrjala
2015-05-21 19:16 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 05/12] drm/i915: Fix DP enhanced framing for CPT ville.syrjala
2015-05-21 19:19 ` Jesse Barnes [this message]
2015-05-05 14:17 ` [PATCH 06/12] drm/i915: Use POSTING_READ() in intel_sdvo_write_sdvox() ville.syrjala
2015-05-06 11:30 ` Daniel Vetter
2015-05-05 14:17 ` [PATCH 07/12] drm/i915: Write the SDVO reg twice on IBX ville.syrjala
2015-05-21 19:20 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 08/12] drm/i915: Fix the IBX transcoder B workarounds ville.syrjala
2015-05-21 19:23 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 09/12] drm/i915: Disable HDMI port after the pipe on PCH platforms ville.syrjala
2015-05-21 19:24 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 10/12] drm/i915: Disable SDVO " ville.syrjala
2015-05-21 19:26 ` Jesse Barnes
2015-05-21 21:24 ` Daniel Vetter
2015-05-05 14:17 ` [PATCH 11/12] drm/i915: Disable CRT port after " ville.syrjala
2015-05-21 19:26 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 12/12] drm/i915: Disable FDI RX/TX before the ports ville.syrjala
2015-05-21 19:27 ` Jesse Barnes
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